Intel E3815 FH8065301567411 데이터 시트
제품 코드
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
4442
Datasheet
33.6.4
D31_F3_Device_Status (SMB_Config_STAT)—Offset 6h
Configuration status register
Access Method
Default: 0290h
7
0b
RO
Wait Cycle Ctrl (WCC):
Wait cycle control - reserved as '0'
6
0b
RO
Parity error response (PER):
Parity error - reserved as '0'
5
0b
RO
VGA palette snnop (VGAPS):
VGA palette snoop - reserved as '0'
4
0b
RO
PMWE:
Postable Memory Write Enable - reserved as '0'
3
0b
RO
SCE:
Special Cycle Enable - reserved as '0'
2
0b
RO
BME:
Bus Master Enable - reserved as '0'
1
0b
RW
MSE:
Memory space enable - 1 enables access to the SM Bus memory space registers
as defined by the Base Address Registes
0
0b
RW
IOSE:
I/O space enable - 1 enables access to the SM Bus I/O space registers as defined
by the Base Address Register
Bit
Range
Default &
Access
Description
Type:
PCI Configuration Register
(Size: 16 bits)
SMB_Config_STAT:
15
12
8
4
0
0
0
0
0
0
0
1
0
1
0
0
1
0
0
0
0
DP
E
SS
E
RM
A
RT
A
ST
A
DEVT
DPE
D
FB2B
UD
F
FRE
Q
66
CLI
IN
T
S
RSV
Bit
Range
Default &
Access
Description
15
0b
RO
DPE:
Detect Parity Error - reserved as '0'
14
0b
RO
SSE:
Signaled System Error - reserved as '0'
13
0b
RO
RMA:
Received Master Abort - reserved as '0'
12
0b
RO
RTA:
Received Target Abort - reserved as '0'
11
0b
RO
STA:
Signaled Target Abort - reserved as '0'
10:9
01b
RO
DEVT:
Devsel Timing Status reserved as 2'b01
8
0b
RO
DPED:
Data Parity Error Detected - reserved as '0'