Intel E3815 FH8065301567411 데이터 시트

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FH8065301567411
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Intel
®
 Atom™ Processor E3800 Product Family
Datasheet
5043
39.8.309 E Debounce Control (cfio_regs_SCORE_DEBOUNCE_CTRL)—
Offset 9D0h
The register is controlling the community debounce
Access Method
Default: 00000000h
39.8.310 E eMMC 4.5 TAP select register 
(cfio_regs_SCORE_TAP_SEL_REG)—Offset 9F4h
The register is controlling the community debounce
1
0b
RW
Sdcard Input Gate En (sdcard_input_gate_en): 
Enable input disable when sd card 
power is down. Affect SD card input pads only  
SDMMC3_D0 
SDMMC3_D1 
SDMMC3_D2 
SDMMC3_D3 
SDMMC3_CMD
0
0b
RO
Reserved (RSVD): 
Reserved.
Bit 
Range
Default & 
Access
Field Name (ID): Description
Type: 
Memory Mapped I/O Register
(Size: 32 bits)
Offset: 
IOBASE Type: 
PCI Configuration Register (Size: 32 bits)
IOBASE Reference: 
[B:0, D:31, F:0] + 4Ch
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
re
se
rv
ed
de
bou
n
ce
_puls
e_c
fg
Bit 
Range
Default & 
Access
Field Name (ID): Description
31:3
0h
RO
Reserved (reserved): 
reserved
2:0
0h
RW
Debounce Pulse Cfg (debounce_pulse_cfg): 
This will divide the rtc clock, for 
generating the pulse of the debounce. When all cleared, pulse will be always high. 
3'b001 375us debounce 
3'b010 750us debounce 
3'b011 1.5ms debounce 
3'b100 3ms debounce 
3'b101 6ms debounce 
3'b110 12ms debounce 
3'b111 24ms debounce 
Recomended values are between 3 to 12 ms