Texas Instruments TMS320DM644x 사용자 설명서
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2.11 DMA Event Support
2.12 Power Management
2.13 Emulation Considerations
Peripheral Architecture
The MMC/SD controller is capable of generating EDMA events for both read and write operations in order
to request service from an EDMA controller. Based on the FIFO threshold setting, the EDMA event signals
generate every time 128-bit or 256-bit data is transferred from the FIFO.
to request service from an EDMA controller. Based on the FIFO threshold setting, the EDMA event signals
generate every time 128-bit or 256-bit data is transferred from the FIFO.
You can put the MMC/SD peripheral in reduced-power modes to conserve power during periods of low
activity. The processor power and sleep controller (PSC) controls the power management of the MMC/SD
peripheral. The PSC acts as a master controller for power management for all of the peripherals on the
device. For detailed information on power management procedures using the PSC, see the
TMS320DM644x DMSoC ARM Subsystem Reference Guide (
activity. The processor power and sleep controller (PSC) controls the power management of the MMC/SD
peripheral. The PSC acts as a master controller for power management for all of the peripherals on the
device. For detailed information on power management procedures using the PSC, see the
TMS320DM644x DMSoC ARM Subsystem Reference Guide (
).
The MMC/SD peripheral is not affected by emulation halt events (such as breakpoints).
Multimedia Card (MMC)/Secure Digital (SD) Card Controller
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SPRUE30B – September 2006