사용자 설명서차례Front Cover1FOR SAFE OPERATION2Preface5Important Alert Messages9Manual Organization11Contents13Illustrations19Figures19Tables21CHAPTER 1 Device Overview231.1 Features241.1.1 Functions and performance241.1.2 Adaptability241.1.3 Interface251.2 Device Specifications261.2.1 Specifications summary261.2.2 Model and product number271.3 Power Requirements281.4 Environmental Specifications311.5 Acoustic Noise321.6 Shock and Vibration321.7 Reliability331.8 Error Rate341.9 Media Defects341.10 Load/Unload Function341.10.1 Recommended power-off sequence351.11 Advanced Power Management (APM)351.12 Interface Power Management (IPM)371.12.1 Host-initiated interface power management (HIPM)371.12.2 Device-initiated interface power management (DIPM)37CHAPTER 2 Device Configuration392.1 Device Configuration402.2 System Configuration412.2.1 SATA interface412.2.2 Drive connection41CHAPTER 3 Installation Conditions433.1 Dimensions443.2 Mounting453.3 Connections with Host System513.3.1 Device connector513.3.2 Signal segment and power supply segment523.3.3 Connector specifications for host system523.3.4 SATA interface cable connection533.3.5 Note about SATA interface cable connection53CHAPTER 4 Theory of Device Operation554.1 Outline564.2 Subassemblies564.2.1 Disk564.2.2 Spindle564.2.3 Actuator564.2.4 Air filter574.3 Circuit Configuration574.4 Power-on Sequence604.5 Self-calibration624.5.1 Self-calibration contents624.5.2 Execution timing of self-calibration634.5.3 Command processing during self-calibration634.6 Read/write Circuit644.6.1 Read/write preamplifier (PreAMP)644.6.2 Write circuit644.6.3 Read circuit654.6.4 Digital PLL circuit664.7 Servo Control674.7.1 Servo control circuit674.7.2 Data-surface servo format694.7.3 Servo frame format714.7.4 Actuator motor control724.7.5 Spindle motor control73CHAPTER 5 Interface755.1 Physical Interface765.1.1 Interface signals765.1.2 Signal interface regulation785.1.3 Electrical specifications815.1.4 Connector pinouts845.1.5 P11 function855.1.6 Hot Plug875.2 Logical Interface885.2.1 Communication layers895.2.2 Outline of the Shadow Block Register905.2.3 Outline of the frame information structure (FIS)915.2.4 Shadow block registers985.3 Host Commands1035.3.1 Command code and parameters1035.3.2 Command descriptions1065.3.3 Error posting2425.4 Command Protocol2445.4.1 Non-data command protocol2445.4.2 PIO data-in command protocol2465.4.3 PIO data-out command protocol2475.4.4 DMA data-in command protocol2495.4.5 DMA data-out command protocol2505.4.6 Native Command Queuing protocol2515.5 Power-on and COMRESET254CHAPTER 6 Operations2576.1 Reset and Diagnosis2586.1.1 Response to power-on2586.1.2 Response to COMRESET2606.1.3 Response to a software reset2636.2 Power Save2646.2.1 Power save mode2646.2.2 Power commands2666.3 Power Save Controlled by Interface Power Management (IPM)2676.3.1 Power save mode of the interface2676.4 Read-ahead Cache2696.4.1 Data buffer structure2696.4.2 Caching operation2706.4.3 Using the read segment buffer2726.5 Write Cache2766.5.1 Cache operation276Glossary279Acronyms and Abbreviations283Index285Comment Form291Back Cover296크기: 6.64메가바이트페이지: 296Language: English매뉴얼 열기