Fujitsu MHM2100AT Manual Do Utilizador
5.6 Timing
C141-E104-02EN
5-111
5.6.3.2 Ultra DMA data burst timing requirements
Table 5.18 Ultra DMA data burst timing requirements (1 of 2)
NAME
MODE 0
(in ns)
MODE 1
(in ns)
MODE 2
(in ns)
MODE 3
(in ns)
MODE 4
(in ns)
COMMENT
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
(see Notes 1 and 2)
t
2CYCTYP
240
160
120
90
60
Typical sustained average two cycle
time
time
t
CYC
112
73
54
39
25
Cycle time allowing for asymmetry
and clock variations (from
STROBE edge to STROBE edge)
and clock variations (from
STROBE edge to STROBE edge)
t
2CYC
230
154
115
86
57
Two cycle time allowing for clock
variations (from rising edge to next
rising edge or from falling edge to
next falling edge of STROBE)
variations (from rising edge to next
rising edge or from falling edge to
next falling edge of STROBE)
t
DS
15
10
7
7
5
Data setup time (at recipient)
(see Note 4)
(see Note 4)
t
DH
5
5
5
5
5
Data hold time (at recipient)
(see Note 4)
(see Note 4)
t
DVS
70
48
30
20
6
Data valid setup time at sender (from
data valid until STROBE edge)
(see Note 5)
data valid until STROBE edge)
(see Note 5)
t
DVH
6
6
6
6
6
Data valid hold time at sender (from
STROBE edge until data may
become invalid) (see Note 5)
STROBE edge until data may
become invalid) (see Note 5)
t
FS
0
230
0
200
0
170
0
130
0
120
First STROBE time (for device to
first negate DSTROBE from STOP
during a data in burst)
first negate DSTROBE from STOP
during a data in burst)
t
LI
0
150
0
150
0
150
0
100
0
100
Limited interlock time (see Note 3)
t
MLI
20
20
20
20
20
Interlock time with minimum
(see Note 3)
(see Note 3)
t
UI
0
0
0
0
0
Unlimited interlock time (see Note 3)
t
AZ
10
10
10
10
10
Maximum time allowed for output
drivers to release (from asserted or
negated)
drivers to release (from asserted or
negated)
t
ZAH
20
20
20
20
20
Minimum delay time required
for output
for output
t
ZAD
0
0
0
0
0
Drivers to assert or negate (from
released)
released)
t
ENV
20
70
20
70
20
70
20
55
20
55
Envelope time (from DMACK- to
STOP and HDMARDY- during
data in burst initiation and from
DMACK to STOP during data out
burst initiation)
STOP and HDMARDY- during
data in burst initiation and from
DMACK to STOP during data out
burst initiation)
t
SR
50
30
20
NA
NA
STROBE-to-DMARDY-time (if
DMARDY- is negated before this long
after STROBE edge, the recipient shall
receive no more than one additional
data word)
DMARDY- is negated before this long
after STROBE edge, the recipient shall
receive no more than one additional
data word)
t
RFS
75
70
60
60
60
Ready-to-Final-STROBE time
(After negating DMARDY-,
STROBE edges should not be sent
beyond this period)
(After negating DMARDY-,
STROBE edges should not be sent
beyond this period)
t
RP
160
125
100
100
100
Ready-to-pause time (that recipient
shall wait to pause after negating
DMARDY-)
shall wait to pause after negating
DMARDY-)
t
IORDYZ
20
20
20
20
20
Maximum time before releasing IORDY