Fujitsu FR81S Manual Do Utilizador
CHAPTER 44: 12-BIT A/D CONVERTER
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: 12-BIT A/D CONVERTER
FUJITSU SEMICONDUCTOR CONFIDENTIAL
59
4.3.1. A/D Control Status Register: ADCS0, ADCS1
The bit configuration of the A/D control status register is shown.
The A/D control status register (ADCS) provides the function to confirm conversion.
ADCS0: Address 1460
H
(Access: Byte, Half-word, Word)
ADCS1: Address 15CC
H
(Access: Byte, Half-word, Word)
bit15
bit14
bit13
bit12
bit11
bit10
bit9
bit8
BUSY
Reserved
Initial value
0
0
0
0
0
0
0
0
Attribute
R,WX
R0,W0
R0,W0
R0,W0
R0,W0
R0,W0
R0,W0
R0,W0
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
Reserved
Initial value
0
0
0
0
0
0
0
0
Attribute R0,W0
R0,W0
R0,W0
R0,W0
R0,W0
R0,W0
R0,W0
R0,W0
[bit15] BUSY : A/D conversion operating bit
BUSY
Function
0
The A/D conversion is stopping.
1
The A/D conversion is operating.
This bit is an operation indicate bit of the A/D converter.
When the reading value of this bit is "0", it is shown that A/D conversion is stopping. When the reading
value of this bit is "1", it is shown that A/D conversion is operating.
This bit value does not change and there is no influence on an operation by writing.
[bit14 to bit0] Reserved
These bits must always be written to "0".
MB91520 Series
MN705-00010-1v0-E
1862