Fujitsu FR81S Manual Do Utilizador
CHAPTER 20: RELOAD TIMER
5. Operation
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : RELOAD TIMER
FUJITSU SEMICONDUCTOR CONFIDENTIAL
FUJITSU SEMICONDUCTOR CONFIDENTIAL
18
5.1.2. Timer Underflow period
The timer underflow period is shown below.
Underflow is defined as counter down-counting from 0x0000. Set the time (period) to underflow occurrence
since timer count operation start in the reload register (TMRLRA/TMRLRB). After loading to the reload
register, underflow takes place if the count value reaches "reload register setting value + 1" count. The timer
underflow period, TUF, in the interval timer mode can be represented as follows:
since timer count operation start in the reload register (TMRLRA/TMRLRB). After loading to the reload
register, underflow takes place if the count value reaches "reload register setting value + 1" count. The timer
underflow period, TUF, in the interval timer mode can be represented as follows:
TUF = Peripheral clock (PCLK) period × prescaler division value (2 to 64) ×
(Reload register value (TMRLRA/B) + 1)
MB91520 Series
MN705-00010-1v0-E
745