Fujitsu FR81S Manual Do Utilizador
CHAPTER 21: 32-BIT FREE-RUN TIMER
5. Operation
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: 32-BIT FREE-RUN TIMER
FUJITSU SEMICONDUCTOR CONFIDENTIAL
32
5.2. Operation of the 32-bit free-run timer selector
This section shows the operations of the 32-bit free-run timer selector.
32-bit free-run timer selector is used to set the free-run timer input of 32-bit output compare and 32-bit input
capture.
This series consists of 32-bit free-run timer (3 channels), 32-bit output compare (6 channels) and 32-bit input
capture (6 channels). The free-run timer used in the register setting shown in the following tables can be
selected.
Table 5-1 Table for Registers
Resource
Register
Remarks
OCU6
FRS8.OS6[1:0]
32-bit output compare
OCU7
FRS8.OS7[1:0]
OCU8
FRS8.OS8[1:0]
OCU9
FRS8.OS9[1:0]
OCU10
FRS8.OS10[1:0]
OCU11
FRS8.OS11[1:0]
ICU4
FRS9.IS4[1:0]
32-bit input capture
ICU5
FRS9.IS5[1:0]
ICU6
FRS9.IS6[1:0]
ICU7
FRS9.IS7[1:0]
ICU8
FRS9.IS8[1:0]
ICU9
FRS9.IS9[1:0]
Table 5-2 Table for Setting Values of Registers
Setting Value
Free-run Timer
00
B
FRT3 (Initial Value)
01
B
FRT4
10
B
FRT5
11
B
Setting prohibit (operation is not guaranteed)
Note:
Before configuring the free-run timer selection register, make sure to verify that the freerun timer is inactive.
MB91520 Series
MN705-00010-1v0-E
827