Intel PCI Manual Do Utilizador

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Software Developer’s Manual
EEPROM Interface
Table 5-3. 82544GC/EI and 82541ER EEPROM Address Map
Word 
Address
HW Access
Description
(Hi Byte)
Description
(Low Byte)
Default
Image Value
(hex)
00h
Yes
IA Byte 2
IA Byte 1
IA(2,1)
01h
Yes
IA Byte 4
IA Byte 3
IA(4,3)
02h
Yes
IA Byte 6
IA Byte 5
IA(6,5)
03h
No
Compatibility high
Compatibility low
0000h
04h
No
Reserved
0000h
05h
No
EEPROM Image Version
Note: Word 05h is reserved for the 82544GC/EI
0000h
06h
07h
No
Reserved
0000h
08h
No
PBA, byte 1
PBA, byte 2
09h
No
PBA, byte 3
PBA, byte 4
0Ah
Yes
Init Control 1, high byte
Init Control 1, low byte
See Text
0Bh
Yes
Subsystem_ID,
high byte
Subsystem_ID, 
low byte
1005h
0Ch
Yes
Subsystem_Vendor, 
high byte
Subsystem_Vendor, 
low byte
8086h
0Dh
Yes
Device ID, high 
Device ID, low
1008h
0Eh
Yes
Vendor ID, high
Vendor ID, low
8086h
0Fh
Yes
Init Control 2, high byte
Init Control 2, low byte
See Text
10h - 1Fh
No
OEM Reserved
OEM Reserved
0000h
20h
Yes
Software Defined Pins 
Control, high byte
Software Defined Pins 
Control, low byte
See Text
21h
Yes
Circuit Control, high
Circuit Control, low
0021h
22h
Yes
D0 Power
D3 Power
See Text
23h - 2Eh
No
Reserved
Reserved
0000h
2Fh
Yes
LEDCTRL Default
Note: Word 2Fh is reserved for the 82544GC/EI
0602h
30h - 33h
Firmware
Intel Boot Agent
Note: Words 30 - 33h are reserved for the 82541ER
0000h
34h - 3Eh
Fixed
Reserved
Reserved
0000h
3Fh
No
Checksum, high byte
Checksum, low byte
Checksum of 
words 00h - 3Eh