Intel BONANZA S478 I875 ATX DDR BLKD875PBZLK Manual Do Utilizador

54 

 

The interrupts can be routed through either the Programmable Interrupt Controller (PIC) or the 
Advanced Programmable Interrupt Controller (APIC) portion of the ICH5-R component.  The PIC 
is supported in Windows 98 SE and Windows ME, and uses the first 16 interrupts.  The APIC is 
supported in Windows 2000 and Windows XP, and supports a total of 24 interrupts. 

NMI 

I/O channel check 

0 

Reserved, interval timer 

1 

Reserved, keyboard buffer full 

2 

Reserved, cascade interrupt from slave PIC 

3 COM2 

(Note 1)

 

4 COM1 

(Note 1)

 

5 

LPT2 (Plug and Play option)/User available 

6 Diskette 

drive 

7 LPT1 

(Note 1)

 

8 Real-time 

clock 

9 

Reserved for ICH5-R system management bus 

10 User 

available 

11 User 

available 

12 

Onboard mouse port (if present, else user available) 

13 

Reserved, math coprocessor 

14 

Primary IDE/Serial ATA (if present, else user available) 

15 

 

Secondary IDE/Serial ATA (if present, else user available) 

16 

(Note 2)

 

USB UHCI controller 1 / USB UHCI controller 4 (through PIRQA) 

17 

(Note 2)

 AC 

‘97 audio/modem/User available (through PIRQB) 

18 

(Note 2)

 

ICH5-R USB controller 3 (through PIRQC) 

19 

(Note 2)

 

ICH5-R USB controller 2 (through PIRQD) 

20 

(Note 2)

 

ICH5-R LAN (through PIRQE) 

21 

(Note 2)

 

User available (through PIRQF) 

22 

(Note 2)

 

User available (through PIRQG) 

23 

(Note 2)

 

ICH5-R USB 2.0 EHCI controller/User available (through PIRQH) 

Notes:  

1.  Default, but can be changed to another IRQ. 

2.  Available in APIC mode only.