Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Ficha De Dados
Códigos do produto
AT91SAM9N12-EK
329
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
28.
Programmable Multibit ECC Controller (PMECC)
28.1
Description
The Programmable Multibit Error Corrected Code Controller (PMECC) is a programmable binary BCH (Bose, Chaudhuri
and Hocquenghem) encoder/decoder. This controller can be used to generate redundancy information for both Single-
Level Cell (SLC) and Multi-level Cell (MLC) NAND Flash devices. It supports redundancy for correction of 2, 4, 8, 12 or
24 bits of error per sector of data.
and Hocquenghem) encoder/decoder. This controller can be used to generate redundancy information for both Single-
Level Cell (SLC) and Multi-level Cell (MLC) NAND Flash devices. It supports redundancy for correction of 2, 4, 8, 12 or
24 bits of error per sector of data.
28.2
Embedded Characteristics
8-bit Nand Flash Data Bus Support
Multibit Error Correcting Code.
Algorithm based on binary shortened Bose, Chaudhuri and Hocquenghem (BCH) codes.
Programmable Error Correcting Capability: 2, 4, 8, 12 and 24 bit of errors per sector.
Programmable Sector Size: 512 bytes or 1024 bytes.
Programmable Number of Sectors per page: 1, 2, 4 or 8 sectors of data per page.
Programmable Spare Area Size.
Supports Spare Area ECC Protection.
Supports 8 Kbytes page size using 1024 bytes per sector and 4 kbytes page size using 512 bytes per sector.
Configurable through APB interface
Multibit Error Detection is Interrupt Driven.