Intel E3815 FH8065301567411 Ficha De Dados
Códigos do produto
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
662
Datasheet
Bit
Range
Default &
Access
Field Name (ID): Description
31
0b
RW
Analog_DisplayPort_Enable:
Project: All
Default Value: 0b
This bit enables or disables the analog port CRT DAC and syncs outputs.
Value Name Description Project
0b Disable Disable the analog port DAC and disable output of syncs All
1b Enable Enable the analog port DAC and enable output of syncs All
30
0b
RW
Pipe_Select:
Project: All
Default Value: 0b
Determines which pipe output will feed this DAC port.
Value Name Description Project
0b Pipe A Pipe A All
1b Pipe B Pipe B All
29:26
0b
RW
Reserved:
Project: All Format:
25:24
0b
RO
CRT_Hot_Plug_Detection_Channel_Status:
Project: All
AccessType: Read Only
Default Value: 00b
These bits are set when a CRT hot plug or unplug event has been detected and indicate
which color channels were attached. Write a one to these bits to clear the status. The
rising or falling edges of these bits are ORed together to go to the main ISR CRT hot
plug register bit.
Value Name Description Project
00b None No channels attached All
01b Blue Blue channel only is attached All
10b Green Green channel only is attached All
11b Both Both blue and green channel attached All
23
0b
RW
CRT_Hot_Plug_Detection_Enable:
Project: All
Default Value: 0b
Hot plug detection is used to set status bits or an interrupt on the connection or
disconnection of a CRT to the analog display port.
Value Name Description Project
0b Disable CRT hot plug detection is disabled All
1b Enable CRT hot plug detection is enabled All
22
0b
RW
CRT_Hot_Plug_Circuit_Activation_Period:
Project: All
Default Value: 0b
This bit sets the activation period for the CRT hot plug circuit.
Value Name Description Project
0b 64 cdclk 64 cdclk periods All
1b 128 cdclk 128 cdclk periods All
21
0b
RW
CRT_Hot_Plug_Detect_Warmup_Time:
Project: All
Default Value: 0b
This bit sets the warmup time for the CRT hot plug circuit.
Value Name Description Project
0b 2M pcdclks 2M pcdclks warmup (approximately 5ms) All
1b 4M pcdclks 4M pcdclks warmup (approximately 10ms) All
20
0b
RW
CRT_Hot_Plug_Detect_Sampling_Period:
Project: All
Default Value: 0b
This bit determines the length of time between sampling periods when the transcoder is
disabled.
Value Name Description Project
0b 1G pcdclks 1G pcdclks (approximately 2 seconds) All
1b 2G pcdclks 2G pcdclks (approximately 4 seconds) All
19:18
01b
RW
CRT_Hot_Plug_Voltage_Compare_Value:
Project: All
Default Value: 01b A0
Compare value for Vref to determine whether the analog port is connected to a CRT.
Value Name Description Project
00b 80 80 All
01b A0 A0 (Default) All
10b C0 C0 All
11b E0 E0 (bit 17 must be = 1) All