Справочник Пользователя для Intel 253668-032US
Vol. 3 6-37
INTERRUPT AND EXCEPTION HANDLING
Saved Instruction Pointer
The saved contents of CS and EIP registers point to the floating-point instruction or
the WAIT/FWAIT instruction that generated the exception.
the WAIT/FWAIT instruction that generated the exception.
Program State Change
A program-state change does not accompany a device-not-available fault, because
the instruction that generated the exception is not executed.
If the EM flag is set, the exception handler can then read the floating-point instruc-
tion pointed to by the EIP and call the appropriate emulation routine.
If the MP and TS flags are set or the TS flag alone is set, the exception handler can
save the context of the x87 FPU, clear the TS flag, and continue execution at the
interrupted floating-point or WAIT/FWAIT instruction.
the instruction that generated the exception is not executed.
If the EM flag is set, the exception handler can then read the floating-point instruc-
tion pointed to by the EIP and call the appropriate emulation routine.
If the MP and TS flags are set or the TS flag alone is set, the exception handler can
save the context of the x87 FPU, clear the TS flag, and continue execution at the
interrupted floating-point or WAIT/FWAIT instruction.