Справочник Пользователя для SMSC LAN9500i

Hi-Speed USB 2.0 to 10/100 Ethernet Controller

Revision 1.7 (10-02-08)

14

SMSC LAN9500/LAN9500i

 

1

JTAG Test 

Clock

(Internal PHY 

Mode)

TCK

IS

(PU)

JTAG Test Clock: In internal PHY mode, this pin 
functions as the JTAG test clock. The maximum 
operating frequency of this clock is 25MHz.

Receive Data 

1

(External 

PHY Mode)

RXD1

IS

(PD)

Receive Data 1: In external PHY mode, this 
signal functions as the receive data 1 input from 
the external PHY.

1

JTAG Test 

Mode Select

(Internal PHY 

Mode)

TMS

IS

(PU)

JTAG Test Mode Select: In internal PHY mode, 
this pin functions as the JTAG test mode select.

Receive Data 

2

(External 

PHY Mode)

RXD2

IS

(PD)

Receive Data 2: In external PHY mode, this 
signal functions as the receive data 2 input from 
the external PHY.

1

JTAG Test 
Data Input

(Internal PHY 

Mode)

TDI

IS

(PU)

JTAG Data Input: When in internal PHY mode, 
this pin functions as the JTAG data input.

Receive Data 

3

(External 

PHY Mode)

RXD3

IS

(PD)

Receive Data 3: In external PHY mode, this pin 
functions as the receive data 3 input from the 
external PHY.

1

PHY Select

PHY_SEL

IS

(PD)

PHY Select: Selects whether to use the internal 
Ethernet PHY or the external PHY connected to 
the MII port.

0 = Internal PHY is used.
1 = External PHY is used. 

1

System Reset

nRESET

IS

(PU)

1

Ethernet 

Full-Duplex 

Indicator LED

nFDX_LED

OD12

(PU)

Ethernet Full-Duplex Indicator LED (Active-
Low): This signal is driven low (LED on) when 
the Ethernet link is operating in full-duplex mode.

General 

Purpose I/O 8

GPIO8

IS/O12/

OD12

(PU)

By default this pin is configured as a 
GPIO.