Техническая Спецификация для Infineon Technologies IC MCU 25 SAK-C167SR-LM HA+ MQFP-144 INF SAK-C167SR-LM HA+
Модели
SAK-C167SR-LM HA+
C167CR
C167SR
Electrical Parameters
Data Sheet
64
V3.3, 2005-02
4.3
Analog/Digital Converter Parameters
Table 13
A/D Converter Characteristics (Operating Conditions apply)
Parameter
Symbol
Limit Values
Unit
Test
Condition
Condition
Min.
Max.
Analog reference supply
V
AREF
SR 4.0
V
DD
+ 0.1 V
1)
1) TUE is tested at
V
AREF
= 5.0 V,
V
AGND
= 0 V,
V
DD
= 4.9 V. It is guaranteed by design for all other voltages within
the defined voltage range.
If the analog reference supply voltage exceeds the power supply voltage by up to 0.2 V
(i.e.
If the analog reference supply voltage exceeds the power supply voltage by up to 0.2 V
(i.e.
V
AREF
=
V
DD
+ 0.2 V) the maximum TUE is increased to
±3 LSB. This range is not 100% tested.
The specified TUE is guaranteed only if the absolute sum of input overload currents on Port 5 pins (see
I
OV
specification) does not exceed 10 mA.
During the reset calibration sequence the maximum TUE may be
During the reset calibration sequence the maximum TUE may be
±4 LSB.
Analog reference ground
V
AGND
SR
V
SS
- 0.1
V
SS
+ 0.2
V
–
Analog input voltage range
V
AIN
SR
V
AGND
V
AREF
V
2)
2)
V
AIN
may exceed
V
AGND
or
V
AREF
up to the absolute maximum ratings. However, the conversion result in these
cases will be X000
H
or X3FF
H
, respectively.
Basic clock frequency
f
BC
0.5
6.25
MHz
3)
3) The limit values for
f
BC
must not be exceeded when selecting the CPU frequency and the ADCTC setting.
Conversion time
t
C
CC –
40
t
BC
+
t
S
+ 2
t
CPU
–
4)
t
CPU
= 1/
f
CPU
4) This parameter includes the sample time
t
S
, the time for determining the digital result and the time to load the
result register with the conversion result.
Values for the basic clock
Values for the basic clock
t
BC
depend on programming and can be taken from
.
This parameter depends on the ADC control logic. It is not a real maximum value, but rather a fixum.
Calibration time after reset
t
CAL
CC –
3328
t
BC
–
5)
5) During the reset calibration conversions can be executed (with the current accuracy). The time required for
these conversions is added to the total reset calibration time.
Total unadjusted error
TUE CC –
±2
LSB
Internal resistance of
reference voltage source
reference voltage source
R
AREF
SR –
t
BC
/ 60
- 0.25
k
Ω
t
BC
in [ns]
6)7)
6) During the conversion the ADC’s capacitance must be repeatedly charged or discharged. The internal
resistance of the reference voltage source must allow the capacitance to reach its respective voltage level
within each conversion step. The maximum internal resistance results from the programmed conversion
timing.
within each conversion step. The maximum internal resistance results from the programmed conversion
timing.
7) Not subject to production test - verified by design/characterization.
Internal resistance of
analog source
analog source
R
ASRC
SR –
t
S
/ 450
- 0.25
k
Ω
t
S
in [ns]
7)8)
ADC input capacitance
C
AIN
CC –
33
pF