Техническая Спецификация для Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD
Модели
ATSAM4S-WPIR-RD
783
SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
36.7.5.3 IrDA Demodulator
The demodulator is based on the IrDA Receive filter comprised of an 8-bit down counter which is loaded with the
value programmed in US_IF. When a falling edge is detected on the RXD pin, the Filter Counter starts counting
down at the master clock (MCK) speed. If a rising edge is detected on the RXD pin, the counter stops and is
reloaded with US_IF. If no rising edge is detected when the counter reaches 0, the input of the receiver is driven
low during one bit time.
illustrates the operations of the IrDA demodulator.
Figure 36-35. IrDA Demodulator Operations
The programmed value in the US_IF register must always meet the following criteria:
t
MCK
* (IRDA_FILTER + 3) < 1.41 µs
As the IrDA mode uses the same logic as the ISO7816, note that the FI_DI_RATIO field in US_FIDI must be set to
a value higher than 0 in order to assure IrDA communications operate correctly.
36.7.6 RS485 Mode
The USART features the RS485 mode to enable line driver control. While operating in RS485 mode, the USART
behaves as though in asynchronous or synchronous mode and configuration of all the parameters is possible. The
difference is that the RTS pin is driven high when the transmitter is operating. The behavior of the RTS pin is
controlled by the TXEMPTY bit. A typical connection of the USART to an RS485 bus is shown in
.
20,000,000
19,200
65
0.16%
9.77
32,768,000
19,200
107
0.31%
9.77
40,000,000
19,200
130
0.16%
9.77
3,686,400
9,600
24
0.00%
19.53
20,000,000
9,600
130
0.16%
19.53
32,768,000
9,600
213
0.16%
19.53
40,000,000
9,600
260
0.16%
19.53
3,686,400
2,400
96
0.00%
78.13
20,000,000
2,400
521
0.03%
78.13
32,768,000
2,400
853
0.04%
78.13
Table 36-13.
IrDA Baud Rate Error (Continued)
Peripheral Clock
Baud Rate (Bit/s)
CD
Baud Rate Error
Pulse Time (µs)
MCK
RXD
Receiver
Input
Pulse
Rejected
6
5
4
3
2
6
1
6
5
4
3
2
0
Pulse
Accepted
Counter
Value