Техническая Спецификация для Intel D2500 DF8064101055400
Модели
DF8064101055400
46
Datasheet - Volume 1 of 2
encrypted contents can be stored in unprotected memory. When hardware decoder
requests the encrypted compressed video stream the data will pass through AES
engine and decrypted by it. The clear data are then forwarded directly to video decoder
unit. During video decoding process video decoder temporarily store some video
parameters and uncompressed pictures to system memory for its own reference, post
processing by graphic engine, or send to output interface by display controller. The
uncompressed pictures have less value and can be protected software mechanism
provided by OS.
The application should employed Tamper Resistance Software (TRS) mechanisms to
protect attacks by debugger and other similar schemes when processing the above
steps.
3.2.5
Multiple Display Configurations
Microsoft Windows 7* operating systems supports for multi-monitor display. Since the
Intel Atom Processor D2000 series and N2000 series has several display ports available
for its two pipes, it can support up to two different images on different display devices.
Timings and resolutions for these two images may be different. The Intel Atom
Processor D2000 series and N2000 series supports Dual Display Clone and Extended
Desktop.
Dual Display Clone uses both display pipes to drive the same content, at the same
resolution and color depth to two different displays. This configuration allows for
different refresh rates on each display.
Extended Desktop uses both display pipes to drive different content, at potentially
different resolutions, refresh rates, and color depths to two different displays. This
configuration allows for a larger Windows Desktop by utilizing both displays as a work
surface.
3.3
Thermal Sensor
There are several registers that need to be configured to support the uncore thermal
sensor functionality and SMI# generation. Customers must enable the Catastrophic
Trip Point as protection for the CPU. If the Catastrophic Trip Point is crossed, then the
CPU will instantly turn off all clocks inside the device. Customers may optionally enable
the Hot Trip Point to generate SMI#. Customers will be required to then write their own
SMI# handler in BIOS that will speed up the CPU (or system) fan to cool the part.
3.3.1
PCI Device 0, Function 0
The SMICMD register requires that a bit be set to generate an SMI# when the Hot Trip
point is crossed. The ERRSTS register can be inspected for the SMI alert.