Техническая Спецификация для Intel E3815 FH8065301567411

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Intel
®
 Atom™ Processor E3800 Product Family
Datasheet
1729
15.8.886 reg_isel_irq_ctrl_reg_irq_status_type 
(isel_irq_ctrl_reg_irq_status)—Offset 90208h
Indicates for each bit whether a non-masked interrupt has been generated (value='1'). 
Can be cleared by writing a '1' into the the corresponding bit of the req_irq_clear 
register.
Access Method
Default: 00000000h
15.8.887 reg_isel_irq_ctrl_reg_irq_clear_type 
(isel_irq_ctrl_reg_irq_clear)—Offset 9020Ch
Access Method
Bit 
Range
Default & 
Access
Description
31:4
0h
RW
unused_reg_irq_mask: 
Unused
3:0
0h
RW
reg_irq_mask: 
indicates for each bit of irq_di whether it can generate an interrupt 
request (value='1') or not (value='0'). Setting will affect reg_irq_value as well as IRQ 
output pin
Type: 
Memory Mapped I/O Register
(Size: 32 bits)
isel_irq_ctrl_reg_irq_status: 
ISPMMADR Type: 
PCI Configuration Register (Size: 32 bits)
ISPMMADR Reference: 
[B:0, D:3, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
unu
se
d_re
g_ir
q_statu
s
irq_
st
at_syn
cgen_eol
irq
_
stat_sy
n
cg
en_s
ol
irq
_
stat_syn
cge
n
_e
of
irq
_
stat_s
yncg
en_s
of
Bit 
Range
Default & 
Access
Description
31:4
0h
RW
unused_reg_irq_status: 
Unused
3
0h
RO
irq_stat_syncgen_eol: 
Represents the irq status of the eol (end of line) bit generated 
by the sync generator
2
0h
RO
irq_stat_syncgen_sol: 
Represents the irq status of the sol (start of line) bit generated 
by the sync generator
1
0h
RO
irq_stat_syncgen_eof: 
Represents the irq status of the eof (end of frame) bit 
generated by the sync generator
0
0h
RO
irq_stat_syncgen_sof: 
Represents the irq status of the sof (start of frame) bit 
generated by the sync generator