Техническая Спецификация для Intel E3815 FH8065301567411
Модели
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
2078
Datasheet
17.19.12 PCS_DWORD11 (pcs_dword11)—Offset 2Ch
Access Method
Default: 0F000000h
Bit
Range
Default &
Access
Description
31:28
0h
RW
reg_rxpwrfsm_timer_WAIT_RX_PI_CLK_3_0:
Rx Power state m/c timer value
used to enable PI clock
27:24
0h
RW
reg_rxpwrfsm_timer_ENABLE_RX_3_0:
Rx Power state m/c timer value used to
enable receivers
23:20
0h
RW
reg_rxpwrfsm_timer_RX_SQEN_3_0:
Rx Power FSM Rx Squelch Enable Timer
Override Value Affect squelch enable startup sequence during 'synchronous' squelch
startup mode. 0000 - Invalid 0001 - 1 susclk period ... 1111 - 15 susclk period
19:16
0h
RW
reg_rxpwrfsm_timer_WAIT_RX_PIBIAS_3_0:
Rx Power state m/c timer value
used to enable PI BIAS
15:8
0h
RW
reg_clk_valid_cnt_7_0:
Over ride value for clock valid delay in clock top block before
toggling phystatus.
7
0h
RW
reg_rxterm:
Override for i_rxterm
6
0h
RW
reg_rxpolarity:
Override for i_rxpolarity
5
0h
RW
reg_rxeqtrain:
Override for i_rxeqtrain
4
0h
RW
reg_rxsquelchen:
Override for i_rxsquelchen
3
0h
RW
cri_rxpwrfsm_sqentimer_ovrden:
Squelch Enable Timer Override Enable Used to
override the squelch enable timer in PCS with the timer value set by the Rx Squelch
Enable timer register (reg_rxpwrfsm_timer_RX_SQEN[3:0]).
2
0h
RW
reg_rxintfltren_override:
Rx Integral Filter Override Select 0: selects i_rxintfltren_l
input pin. 1: selects reg_rxintfltren_l register
1
0h
RW
reg_rxintfltren_l:
Override for Rx integral filter enable i_rxintfltren_l
0
0h
RW
reg_clk_valid_cnt_ovrd:
Override enable for reg_clk_valid_cnt
Type:
Message Bus Register
(Size: 32 bits)
pcs_dword11:
Op Codes:
0h - Read, 1h - Write
0h - Read, 1h - Write