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FX
3G
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3U
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3UC
Series Programmable Controllers
Programming Manual - Basic & Applied Instruction Edition
17 Data Transfer 2 – FNC100 to FNC109
17.1 FNC102 – ZPUSH/Batch Store of Index Register
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NC4
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NC7
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17.1
FNC102 – ZPUSH/Batch Store of Index Register
Outline
This instruction temporarily batch-stores the present value of the index registers V0 to V7 and Z0 to Z7.
For restoring the present value of temporarily batch-stored index registers, use ZPOP (FNC103) instruction.
For restoring the present value of temporarily batch-stored index registers, use ZPOP (FNC103) instruction.
→ For ZPOP (FNC103) instruction, refer to Section 17.2.
1. Instruction format
2. Set data
3. Applicable devices
Explanation of function and operation
1. 16-bit operation (ZPUSH/ZPUSHP)
1) The contents of the index registers V0 to V7 and Z0 to Z7 are batch-stored temporarily to
and later. When
the contents of index registers are batch-stored, the number of times of batch-storage
is incremented by
"1".
2) For restoring the batch-stored data, use ZPOP (FNC103) instruction.
Use ZPUSH (FNC102) and ZPOP (FNC103) instruction as a pair.
3) By specifying a same device to
, ZPUSH (FNC102) and ZPOP (FNC103) instructions can be used in the
nest structure.
In this case, the occupied points are added by "16" after
In this case, the occupied points are added by "16" after
every time ZPUSH (FNC102) instruction is
executed. Secure in advance sufficient area for the number of the next structure.
Operand Type
Description
Data Type
Head device number batch-storing the present value of the index registers V0 to V7 and
Z0 to Z7
Z0 to Z7
: Number of times of batch-storage
+1 to
+16
× Number of times of batch-storage: Batch-stored data storage
destination
16-bit binary
Oper-
and
Type
Bit Devices
Word Devices
Others
System User
Digit Specification
System User
Special
Unit
Index
Con-
stant
stant
Real
Number
Charac-
ter String
Pointer
X Y M T C S D
.b KnX KnY KnM KnS T C D R U
\G
V
Z Modify K H
E
"
"
P
3 3
−
−
−
P
FNC 102
ZPUSH
16-bit Instruction
3 steps ZPUSH
ZPUSHP
Continuous
Operation
Pulse (Single)
Pulse (Single)
Operation
Mnemonic
Operation Condition
Mnemonic
Operation Condition
32-bit Instruction
D
D
D
D
D
D
Command
input
FNC102
ZPUSH
D
D
D
D
D