Справочник Пользователя для Intel 8XC196MD

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CONTENTS
4.1.5.1
Memory-mapped SFRs  ........................................................................................4-5
4.1.5.2
Peripheral SFRs ...................................................................................................4-5
4.1.6
Register File ..............................................................................................................4-9
4.1.6.1
General-purpose Register RAM  .........................................................................4-10
4.1.6.2
Stack Pointer (SP) ..............................................................................................4-10
4.1.6.3
CPU Special-function Registers (SFRs) .............................................................4-11
4.2
WINDOWING............................................................................................................... 4-12
4.2.1
Selecting a Window  ................................................................................................4-13
4.2.2
Addressing a Location Through a Window  .............................................................4-14
4.2.2.1
32-byte Windowing Example ..............................................................................4-16
4.2.2.2
64-byte Windowing Example ..............................................................................4-16
4.2.2.3
128-byte Windowing Example ............................................................................4-16
4.2.2.4
Unsupported Locations Windowing Example .....................................................4-16
4.2.2.5
Using the Linker Locator to Set Up a Window ....................................................4-17
4.2.3
Windowing and Addressing Modes .........................................................................4-19
CHAPTER 5
STANDARD AND PTS INTERRUPTS
5.1
OVERVIEW OF INTERRUPTS...................................................................................... 5-1
5.2
INTERRUPT SIGNALS AND REGISTERS ................................................................... 5-3
5.3
INTERRUPT SOURCES AND PRIORITIES.................................................................. 5-4
5.3.1
Special Interrupts  ......................................................................................................5-6
5.3.1.1
Unimplemented Opcode  ......................................................................................5-6
5.3.1.2
Software Trap .......................................................................................................5-6
5.3.1.3
NMI .......................................................................................................................5-6
5.3.2
External Interrupt Pin  ................................................................................................5-6
5.3.3
Multiplexed Interrupt Sources  ...................................................................................5-7
5.3.4
End-of-PTS Interrupts  ...............................................................................................5-9
5.4
INTERRUPT LATENCY................................................................................................. 5-9
5.4.1
Situations that Increase Interrupt Latency  ................................................................5-9
5.4.2
Calculating Latency .................................................................................................5-10
5.4.2.1
Standard Interrupt Latency .................................................................................5-10
5.4.2.2
PTS Interrupt Latency  ........................................................................................5-11
5.5
PROGRAMMING THE INTERRUPTS......................................................................... 5-12
5.5.1
Modifying Interrupt Priorities  ...................................................................................5-18
5.5.2
Determining the Source of an Interrupt  ...................................................................5-20
5.6
INITIALIZING THE PTS CONTROL BLOCKS............................................................. 5-24
5.6.1
Specifying the PTS Count .......................................................................................5-25
5.6.2
Selecting the PTS Mode  .........................................................................................5-27
5.6.3
Single Transfer Mode ..............................................................................................5-27
5.6.4
Block Transfer Mode  ...............................................................................................5-30
5.6.5
A/D Scan Mode .......................................................................................................5-32
5.6.5.1
A/D Scan Mode Cycles  ......................................................................................5-35
5.6.5.2
A/D Scan Mode Example 1  ................................................................................5-35
5.6.5.3
A/D Scan Mode Example 2  ................................................................................5-37