Advantech PCI-1718 Series 用户手册
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Appendix C
C.11 Clear Interrupt Request — BASE+08H
Write any value to register BASE+08H to clear the interrupt request.
C.12 A/D Status — BASE+08H
Read-only register BASE+08H provides information on the A/D configu-
ration and operation. Including:
• Bipolar or unipolar input for the channel to be converted next
• Single-ended or differential input
• Interrupt status for the channel already converted
• End of conversion for the channel already converted
• Channel to be converted next
Writing to this I/O port with any data value clears its INT bit. The other
data bits do not change.
ration and operation. Including:
• Bipolar or unipolar input for the channel to be converted next
• Single-ended or differential input
• Interrupt status for the channel already converted
• End of conversion for the channel already converted
• Channel to be converted next
Writing to this I/O port with any data value clears its INT bit. The other
data bits do not change.
EOC
End of Conversion
0 The A/D conversion is idle, ready for the next conversion. Data from
the previous conversion is available in the A/D data registers.
1 The A/D converter is busy, implying that the A/D conversion is in
progress.
the previous conversion is available in the A/D data registers.
1 The A/D converter is busy, implying that the A/D conversion is in
progress.
Table C.13: Register for Clear Interrupt Request
Write
A/D control
Bit #
7
6
5
4
3
2
1
0
BASE + 09H
X
X
X
X
X
X
X
X
Table C.14: Register for A/D Status
Read
A/D status
Bit #
7
6
5
4
3
2
1
0
BASE + 08H
EOC U/B
MUX INT
CN3 CN2 CN1 CN0