Fujitsu MHC2040AT 用户手册
5.6 Timing
C141-E050-02EN
5-95
5.6.3 Multiword DMA data transfer
Figure 5.10 shows the multiword DMA data transfer timing between the device
and the host system.
and the host system.
Delay time from DIOR-/DIOW- assertion to DMARQ negation
Figure 5.12 Multiword DMA data transfer timing (mode 2)