altium designer 6-module 7-fpga to pcb 用户手册
Altium Designer Training Module
FPGA to PCB
7 - 3
6. Set the frequency of the clock generator to a value around 1KHz. Because we are sending a
50% duty cycle signal to the processor, T2 should be almost exactly double T1.
7. Save your work. It will be used for the basis of the next couple of exercises.
2.2
Exercise 2 – Simulated accelerometer using DIP-switches
The next step will make use of the PWM circuit developed in Exercise 1 of Day 1. This circuit
operates at a fixed frequency but now we have control over the mark / space ratio.
operates at a fixed frequency but now we have control over the mark / space ratio.
1. Before doing any modifications, save SL_FPGA_FrqGen.SchDoc as SL_FPGA_PWM.SchDoc.
2. Modify SL_FPGA_PWM.SchDoc to include the PWM circuit instead of the Frequency Generator
as shown in Figure 3.
TSK51A OCD Microprocessor
CLK
RST
EA
EA
SFRDATAO[7..0]
SFRDATAI[7..0]
SFRDATAI[7..0]
SFRADDR[6..0]
SFRWR
SFRRD
SFRWR
SFRRD
ROMDATAO[7..0]
ROMDATAI[7..0]
ROMDATAI[7..0]
ROMADDR[15..0]
ROMWR
ROMRD
ROMWR
ROMRD
INT0
INT1
INT1
T0
T1
T1
RXD
TXD
RXDO
TXD
RXDO
P0O[7..0]
P0I[7..0]
P1O[7..0]
P1I[7..0]
P2O[7..0]
P2I[7..0]
P3O[7..0]
P3I[7..0]
MEMDATAO[7..0]
MEMDATAI[7..0]
MEMADDR[15..0]
MEMWR
MEMRD
PSWR
PSRD
U3
TSK51A_D
GND
GND
[11..0]
[11..0]
CLK_BRD
P182
P182
CLK
DELAY[7..0]
INIT
U6
FPGA_STARTUP8
U4
OR2N1S
VCC
TEST_BUTTON
P3
P3
CLK_BRD
CLK
DOUT[7..0]
ADDR[11..0]
DIN[7..0]
WE
U1
RAMS_8x4K
U9
INV
Reset
VCC
SW[7..0]
P63,P64,P68,P69,P70,P71,P73,P74
P63,P64,P68,P69,P70,P71,P73,P74
1
2
3
4
5
6
7
8
ON
CLK_BRD
Frequency Counter
FREQA
FREQB
FREQB
TIMEBASE
U11
FRQCNT2
CLR
CEO
TC
CE
C
Q[7..0]
U7
CB8CEB
/ 256
U12
CDIV256
CLK_BRD
A[7..0]
B[7..0]
B[7..0]
GT
LT
U8
COMPM8B
Figure 3. Using DIP switches and PWM circuit to simulate the operation of the accelerometer
3. Build the design and download it to the NanoBoard.
4. Set the NanoBoard Clock to 50MHz and ensure that at least one of the NanoBoard DIP switches
is set to ON.
5. Observe the output on the LCD and the Frequency Counter. Flip some of the DIP-switches and
see that the LCD display reflects the change in the mark-to-space ratio.
6. Save your work.
2.3
Exercise 3 – Simulated accelerometer using an IOB
Without laboring the point about simulated circuits too much, there may be situations where it is not
convenient to consume hardware resources such as the DIP-switches to simulate a circuit’s
operation. It is here that the control afforded by the NanoBoard is such a great asset.
convenient to consume hardware resources such as the DIP-switches to simulate a circuit’s
operation. It is here that the control afforded by the NanoBoard is such a great asset.
1. Before doing any modifications, save SL_FPGA_PWM.SchDoc as SL_FPGA_PWM_IOB.SchDoc.
2. Modify SL_FPGA_PWM_IOB.SchDoc by removing the DIP switches and replace them with a
digital IOB module.
3. Build the design and download it to the NanoBoard.