Intel i7-3920XM Extreme AW8063801009607 用户手册
产品代码
AW8063801009607
Processor Configuration Registers
134
Datasheet, Volume 2
2.7.3
PVCCTL—Port VC Control Register
B/D/F/Type:
0/1/0–2/MMR
Address Offset:
10C–10Dh
Reset Value:
0000h
Access:
RW, RO
Size:
16 bits
BIOS Optimal Default
000h
Bit
Access
Reset
Value
RST/
PWR
Description
15:4
RO
0h
Reserved (RSVD)
3:1
RW
000b
Uncore
VC Arbitration Select (VCAS)
This field will be programmed by software to the only possible
This field will be programmed by software to the only possible
value as indicated in the VC Arbitration Capability field. Since
there is no other VC supported than the default, this field is
reserved.
0
RO
0b
Uncore
Reserved for Load VC Arbitration Table (VCARB)
Used for software to update the VC Arbitration Table when VC
Used for software to update the VC Arbitration Table when VC
arbitration uses the VC Arbitration Table. As a VC Arbitration
Table is never used by this component this field will never be
used.