Intel E3815 FH8065301567411 数据表
产品代码
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
2174
Datasheet
18.7.6
Capability Parameters (HCCPARAMS)—Offset 10h
The default values for all fields in this register are implementation dependent. This
register defines optional capabilities supported by the xHCI. This register is modified
and maintained by BIOS.
Access Method
Default: 200071E1h
15:8
00h
RW/L
Rsvd1:
Reserved.
Power Well:
Core
7:0
01h
RW/L
U1 Device Exit Latency (U1DEL):
Worst case latency to transition a root hub Port
Link State (PLS) from U1 to U0. Applies to all root hub ports. The following are
permissible values:
•
•
01h = Less than 1 s
•
02h = Less than 2 s
•
...
•
0Ah = Less than 10 s
•
0B-FFh = Reserved
Power Well:
Core
Bit
Range
Default &
Access
Field Name (ID): Description
Type:
Memory Mapped I/O Register
(Size: 32 bits)
Offset:
MBAR Type:
PCI Configuration Register (Size: 64 bits)
MBAR Reference:
[B:0, D:20, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 1 1 1 1 0 0 0 0 1
xE
C
P
MaxP
S
A
Siz
e
Rsvd1
PA
E
NS
S
LT
C
LH
RC
PI
N
D
PPC
CS
Z
BNC
AC6
4
Bit
Range
Default &
Access
Field Name (ID): Description
31:16
2000h
RW/L
xHCI Extended Capabilities Pointer (xECP):
This field indicates the existence of a
capabilities list. The value of this field indicates a relative offset, in 32-bit words, from
Base to the beginning of the first extended capability.
For example, using the offset of Base is 1000h and the xECP value of 0068h, we can
calculate the following effective address of the first extended capability: 1000h +
(0068h (( 2) -) 1000h + 01A0h -) 11A0h
a. This is not tightly coupled with the USBBASE address register mapping control.
Power Well:
Core
15:12
7h
RW/L
Maximum Primary Stream Array Size (MaxPSASize):
This field identifies the
maximum size Primary Stream Array that the xHC supports. The Primary Stream Array
size = 2^(MaxPSASize+1).
Valid MaxPSASize values are 0 to 15, where 0 indicates that Streams are not supported.
Power Well:
Core
11:9
0h
RW/L
Rsvd1:
Reserved.
Power Well:
Core