Intel E3815 FH8065301567411 数据表
产品代码
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
Datasheet
2755
20.6.64
ISD3CBL—Offset E8h
Input Stream Descriptor 3 Cyclic Buffer Length
Access Method
Default: 00000000h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
LINK_P
OSITION_
IN_BUFFER
Bit
Range
Default &
Access
Description
31:0
0h
RO
LINK_POSITION_IN_BUFFER:
Indicates the number of bytes that have been
received off the link. This register will count from 0 to the value in the Cyclic Buffer
Length register and then wrap to 0.
Type:
Memory Mapped I/O Register
(Size: 32 bits)
ISD3CBL:
AZLBAR Type:
PCI Configuration Register (Size: 32 bits)
AZLBAR Reference:
[B:0, D:27, F:0] + 10h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
CY
CLIC
_BUFFER_
LE
NGTH
Bit
Range
Default &
Access
Description
31:0
0h
RW
CYCLIC_BUFFER_LENGTH:
Indicates the number of bytes in the complete cyclic
buffer. CBL must represent an integer number of samples. Link Position in Buffer LPIB
will be reset when it reaches this value. Software may only write to this register after
Global Reset Controller Reset or Stream Reset has occurred. This value should only be
modified when the RUN bit is 0 . Once the RUN bit has been set to enable the engine
software must not write to this register until after the next reset is asserted or transfers
may be corrupted.