Renesas M32R-FPU 用户手册

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页码 192
3
3-52
M32R-FPU Software Manual (Rev.1.01)
INSTRUCTIONS
3.2 Instruction description
FSUB
FSUB
[Mnemonic]
FSUB  Rdest,Rsrc1,Rsrc2
[Function]
Floating-point subtract
Rdest = Rsrc1 - Rsrc2 ;
[Description]
Subtract the floating-point single precision value stored in Rsrc2 from the floating-point single
precision value stored in Rsrc1 and store the results in Rdest. The result is rounded according to
the RM field of FPSR. The DN bit of FPSR handles the modification of denormalized numbers.
The condition bit (C) remains unchanged.
[EIT occurrence]
Floating-Point Exceptions (FPE)
• Unimplemented Operation Exception (UIPL)
• Invalid Operation Exception (IVLD)
• Overflow (OVF)
• Underflow (UDF)
• Inexact Exception (IXCT)
[Encoding]
floating-point Instructions
Floating-point subtract
[M32R-FPU Extended Instruction]
src1
1101
src2
0000
dest
0000
0000
0100
FSUB  Rdest,Rsrc1,Rsrc2