Delta Tau GEO PMAC 用户手册
Geo PMAC Drive User Manual
Setting Up Encoders
51
digits specify the address of the source register. Ix81 should specify the same address as in Ix83, whether
the hardware-input register for the encoder (Y:$FF54 or Y:$FF74), or the processed result in the
conversion table (e.g. X:$0722 or X:$0725).
the hardware-input register for the encoder (Y:$FF54 or Y:$FF74), or the processed result in the
conversion table (e.g. X:$0722 or X:$0725).
The first two hex digits specify the number of bits to be read (starting at bit 0 of the source), with an
added $40 if an X-register is read. The number of bits should express the number of bits of the SSI
sensor in one revolution if the hardware-input register is used, or the number of bits plus 5 if the
processed data in the ECT is used.
added $40 if an X-register is read. The number of bits should express the number of bits of the SSI
sensor in one revolution if the hardware-input register is used, or the number of bits plus 5 if the
processed data in the ECT is used.
Remember that the difference between the zero point of the SSI encoder data (over one revolution) and
the zero point of the commutation cycle (usually established once by a “stepper motor” phasing search) is
held in variable Ix75 for the motor.
the zero point of the commutation cycle (usually established once by a “stepper motor” phasing search) is
held in variable Ix75 for the motor.
Ix70, Ix71: Commutation Cycle Size
The size of the commutation cycle size, in PMAC counts, is Ix71/Ix70. Normally Ix71 specifies the
number of counts in a motor mechanical revolution, and Ix70 the number of pole pairs (commutation
cycles) per mechanical revolution. For a linear motor, Ix70 is usually set to 1 and Ix71 set to the number
of counts per pole pair of the motor.
number of counts in a motor mechanical revolution, and Ix70 the number of pole pairs (commutation
cycles) per mechanical revolution. For a linear motor, Ix70 is usually set to 1 and Ix71 set to the number
of counts per pole pair of the motor.
If Ix83 specifies an SSI hardware input register (Y:$FF54 or Y:$FF74), a count here is equivalent to an
LSB from the SSI sensor. However, if Ix83 specifies the processed result register in the conversion table
(e.g. X:$0722 or X:$0725), a count here is equivalent to 1/32 of an LSB from the sensor, so Ix71 will
have to be 32 times bigger than it otherwise would be.
LSB from the SSI sensor. However, if Ix83 specifies the processed result register in the conversion table
(e.g. X:$0722 or X:$0725), a count here is equivalent to 1/32 of an LSB from the sensor, so Ix71 will
have to be 32 times bigger than it otherwise would be.
Commutation Example 1
A 24-bit multi-turn SSI encoder with 12 bits (4096 LSBs) per mechanical revolution is used on a 6-pole
brushless servo motor. It is wired into Channel 1 and is to be used for the phase commutation of Motor 1.
Since the data is a full 24 bits, the hardware-input register can be used directly.
brushless servo motor. It is wired into Channel 1 and is to be used for the phase commutation of Motor 1.
Since the data is a full 24 bits, the hardware-input register can be used directly.
I183=$8FF54
; Read Y:$FF54 for ongoing phase position
I181=$0CFF54
; Read low 12 bits of Y:$FF54 for power-on phase position
I170=3
; 3 pole pairs per mechanical revolution
I171=4096
; 4096 counts per mechanical revolution
Commutation Example 2
A 12-bit single-turn SSI encoder is used on a 6-pole brushless motor that will turn many revolutions. It is
wired into Channel 1 and is to be used for the phase commutation of Motor 1. It is processed in the first
entry of the conversion table. Because the data is less than 24 bits and will roll over, we must use the
processed result of the conversion table.
wired into Channel 1 and is to be used for the phase commutation of Motor 1. It is processed in the first
entry of the conversion table. Because the data is less than 24 bits and will roll over, we must use the
processed result of the conversion table.
I183=$0722
; Read X:$0722 for ongoing phase position
I181=$510722
; Read low 17 (12+5) bits of X:$0722 for power-on phase position
I170=3
; 3 pole pairs per mechanical revolution
I171=131072
; 4096*32 PMAC counts per mechanical revolution