用户手册 — Hitachi 100GB 7200 RPM

目录

• 1.0 General

  15
  • 1.1 Introduction

    15
  • 1.2 References

    15
  • 1.3 Abbreviations

    15
  • 1.4 Caution

    17
• 2.0 General features of the drive

  19
• 3.0 Fixed-disk subsystem description

  23
  • 3.1 Control electronics

    23
  • 3.2 Head disk assembly

    23
• 4.0 Drive characteristics

  25
  • 4.1 Formatted capacity

    25
  • 4.2 Data sheet

    25
  • 4.3 Drive organization

    26
    • 4.3.1 Drive format

      26
    • 4.3.2 Cylinder allocation

      26
  • 4.4 Performance characteristics

    28
    • 4.4.1 Command overhead

      28
    • 4.4.2 Mechanical positioning

      28
    • 4.4.3 Drive ready time

      30
    • 4.4.4 Operating modes

      30
• 5.0 Data integrity

  33
  • 5.1 Data loss at power off

    33
  • 5.2 Write Cache

    33
  • 5.3 Equipment status

    33
  • 5.4 WRITE safety

    34
  • 5.5 Data buffer test

    34
  • 5.6 Error recovery

    34
  • 5.7 Automatic reallocation

    34
  • 5.8 ECC

    35
• 6.0 Specification

  37
  • 6.1 Environment

    37
    • 6.1.1 Temperature and humidity

      37
    • 6.1.2 Corrosion test

      38
  • 6.2 Radiation noise

    38
  • 6.3 Conductive noise

    39
  • 6.4 Magnetic fields

    39
  • 6.5 DC power requirements

    39
    • 6.5.1 Power consumption efficiency

      40
  • 6.6 Reliability

    41
    • 6.6.1 Data integrity

      41
    • 6.6.2 Cable noise interference

      41
    • 6.6.3 Service life and usage condition

      41
    • 6.6.4 Preventive maintenance

      41
    • 6.6.5 Load/Unload

      41
  • 6.7 Emergency unload

    42
    • 6.7.1 Required power-off sequence

      42
  • 6.8 Mechanical specifications

    43
    • 6.8.1 Physical dimensions and weight

      43
    • 6.8.2 Mounting hole locations

      43
    • 6.8.3 Connector and jumper description

      44
    • 6.8.4 Drive mounting

      44
    • 6.8.5 Load/unload mechanism

      44
  • 6.9 Vibration and shock

    44
    • 6.9.1 Operating vibration

      44
    • 6.9.2 Nonoperating vibration

      45
    • 6.9.3 Operating shock

      45
    • 6.9.4 Nonoperating shock

      46
  • 6.10 Acoustics

    46
    • 6.10.1 Discrete tone penalty

      46
  • 6.11 Identification labels

    47
  • 6.12 Safety

    47
    • 6.12.1 UL and CSA approval

      47
    • 6.12.2 German safety mark

      47
    • 6.12.3 Flammability

      47
    • 6.12.4 Safe handling

      47
    • 6.12.5 Environment

      47
    • 6.12.6 Secondary circuit protection

      48
  • 6.13 Electromagnetic compatibility

    48
    • 6.13.1 CE mark

      48
    • 6.13.2 C-TICK mark

      48
    • 6.13.3 BSMI mark

      48
  • 6.14 Packaging

    48
• 7.0 Electrical interface specification

  49
  • 7.1 Cabling

    49
  • 7.2 Interface connector

    49
  • 7.3 Signal definitions

    50
• 8.0 General

  53
  • 8.1 Introduction

    53
  • 8.2 Terminology

    53
  • 8.3 Deviations from standard

    53
• 9.0 Registers

  55
  • 9.1 Register naming convention

    55
  • 9.2 Command Register

    56
  • 9.3 Device Control Register

    56
  • 9.4 Device Register

    56
  • 9.5 Error Register

    57
  • 9.6 Features Regsiter

    57
  • 9.7 LBA High Register

    57
  • 9.8 LBA Low Register

    58
  • 9.9 LBA Mid Register

    58
  • 9.10 Sector Count Register

    58
  • 9.11 Status Register

    58
• 10.0 General operation descriptions

  61
  • 10.1 Reset response

    61
  • 10.2 Register initialization

    62
  • 10.3 Diagnostic and Reset considerations

    62
  • 10.4 Power-off considerations

    62
    • 10.4.1 Load/Unload

      62
    • 10.4.2 Emergency unload

      63
    • 10.4.3 Required power-off sequence

      63
  • 10.5 Sector Addressing Mode

    63
    • 10.5.1 Logical CHS Addressing Mode

      64
    • 10.5.2 LBA Addressing Mode

      64
  • 10.6 Power management features

    64
    • 10.6.1 Power mode

      65
    • 10.6.2 Power management commands

      65
    • 10.6.3 Standby/Sleep command completion time

      65
    • 10.6.4 Standby timer

      65
    • 10.6.5 Status

      65
    • 10.6.6 Interface capability for power modes

      66
    • 10.6.7 Initial Power Mode at Power On

      66
  • 10.7 Interface Power Management Mode (Slumber and Partial)

    66
  • 10.8 S.M.A.R.T. Function

    66
    • 10.8.1 Attributes

      66
    • 10.8.2 Attribute values

      67
    • 10.8.3 Attribute thresholds

      67
    • 10.8.4 Threshold exceeded condition

      67
    • 10.8.5 S.M.A.R.T. commands

      67
    • 10.8.6 S.M.A.R.T. operation with power management modes

      67
  • 10.9 Security Mode Feature Set

    67
    • 10.9.1 Security mode

      68
    • 10.9.2 Security level

      68
    • 10.9.3 Password

      68
    • 10.9.4 Master Password Revision Code

      68
    • 10.9.5 Command table

      72
  • 10.10 Protected Area Function

    73
    • 10.10.1 Example for operation (In LBA Mode)

      73
    • 10.10.2 Set Max security extension commands

      74
  • 10.11 Seek Overlap

    75
  • 10.12 Write Cache function

    76
  • 10.13 Reassign Function

    76
    • 10.13.1 Auto Reassign Function

      77
  • 10.14 48-bit Address Feature Set

    78
  • 10.15 Software Setting Preservation Feature Set

    78
    • 10.15.1 Preserved software settings

      78
  • 10.16 Native Command Queuing

    79
• 11.0 Command protocol

  81
  • 11.1 Data In commands

    81
  • 11.2 Data Out Commands

    82
  • 11.3 Non-data commands

    82
  • 11.4 DMA Data Transfer Commands

    83
  • 11.5 First-parity DMA Commands

    84
• 12.0 Command descriptions

  85
  • 12.1 Check Power Mode (E5h/98h)

    89
  • 12.2 Device Configuration Overlay (B1h)

    90
    • 12.2.1 DEVICE CONFIGURATION RESTORE (subcommand C0h)

      90
    • 12.2.2 DEVICE CONFIGURATION FREEZE LOCK (subcommand C1h)

      90
    • 12.2.3 DEVICE CONFIGURATION IDENTIFY (subcommand C2h)

      91
    • 12.2.4 DEVICE CONFIGURATION SET (subcommand C3h)

      91
  • 12.3 Execute Device Diagnostic (90h)

    94
  • 12.4 Flush Cache (E7h)

    95
  • 12.5 Flush Cache EXT (EAh)

    96
  • 12.6 Format Track (50h: vendor specific)

    97
  • 12.7 Format Unit (F7h: vendor specific)

    98
  • 12.8 Identify Device (ECh)

    99
  • 12.9 Idle (E3h/97h)

    110
  • 12.10 Idle Immediate (E1h/95h)

    111
  • 12.11 Initialize Device Parameters (91h)

    112
  • 12.12 Read Buffer (E4h)

    113
  • 12.13 Read DMA (C8h/C9h)

    114
  • 12.14 Read DMA EXT (25h)

    116
  • 12.15 Read FPDMA Queued (60h)

    118
  • 12.16 Read Log Ext (2Fh)

    120
    • 12.16.1 General Purpose Log Directory

      121
    • 12.16.2 Extended Comprehensive SMART Error Log

      122
    • 12.16.3 Extended Self-test log sector

      124
    • 12.16.4 Command Error

      126
  • 12.17 Read Long (22h/23h)

    127
  • 12.18 Read Multiple (C4h)

    129
  • 12.19 Read Multiple EXT (29h)

    131
  • 12.20 Read Native Max ADDRESS (F8h)

    132
  • 12.21 Read Native Max ADDRESS EXT (27h)

    133
  • 12.22 Read Sectors (20h/21h)

    134
  • 12.23 Read Sector(s) EXT (24h)

    135
  • 12.24 Read Verify Sectors (40h/41h)

    137
  • 12.25 Ready Verify Sector(s) EXT (42h)

    139
  • 12.26 Recalibrate (1xh)

    141
  • 12.27 Security Disable Password (F6h)

    142
  • 12.28 Security Erase Prepare (F3h)

    143
  • 12.29 Security Erase Unit (F4h)

    144
  • 12.30 Security Freeze Lock (F5h)

    146
  • 12.31 Security Set Password (F1h)

    147
  • 12.32 Security Unlock (F2h)

    149
  • 12.33 Seek (7xh)

    150
  • 12.34 Sense Condition (F0h: vendor specific)

    151
  • 12.35 Set Features (EFh)

    152
  • 12.36 Set Max ADDRESS (F9h)

    154
  • 12.37 Set Max ADDRESS EXT (37h)

    156
  • 12.38 Set Multiple (C6h)

    158
  • 12.39 Sleep (E6h/99h)

    159
  • 12.40 S.M.A.R.T. Function Set (B0h)

    160
    • 12.40.1 S.M.A.R.T. Subcommands

      160
    • 12.40.2 Device Attribute Data Structure

      166
    • 12.40.3 Device Attribute Thresholds data structure

      171
    • 12.40.4 S.M.A.R.T. Log Directory

      173
    • 12.40.5 S.M.A.R.T. error log sector

      173
    • 12.40.6 Self-test log data structure

      176
    • 12.40.7 Selective self-test log data structure

      176
    • 12.40.8 Error reporting

      177
  • 12.41 Standby (E2h/96h)

    178
  • 12.42 Standby Immediate (E0h/94h)

    179
  • 12.43 Write Buffer (E8h)

    180
  • 12.44 Write DMA (CAh/CBh)

    181
  • 12.45 Write DMA EXT (35h)

    183
  • 12.46 Write DMA FUE Ext (3Dh)

    185
  • 12.47 Write FPDMA Queued (61h)

    187
  • 12.48 Write Log Ext (3Fh)

    189
  • 12.49 Write Long (32h/33h)

    190
  • 12.50 Write Multiple (C5h)

    192
  • 12.51 Write Multiple EXT (39h)

    193
  • 12.52 Write Multiple FUA Ext (CEh)

    195
  • 12.53 Write Sectors (30h/31h)

    197
  • 12.54 Write Sectors(s) EXT (34h)

    199
  • 12.55 Write Verify (3Ch: vendor specific)

    200
• 13.0 Timings

  201