Renesas rl78 Benutzerhandbuch

 

RL78/G1A 

 

CHAPTER  5   CLOCK  GENERATOR 

R01UH0305EJ0200  Rev.2.00 

 

 

150  

Jul 04, 2013 

This register is used to select the X1 clock oscillation stabilization wait time.   

When the X1 clock is made to oscillate by clearing the MSTOP bit to start the X1 oscillation circuit operating, actual 

operation is automatically delayed for the time set in the OSTS register. 

When switching the CPU clock from the high-speed on-chip oscillator clock or the subsystem clock to the X1 clock, and 

when using the high-speed on-chip oscillator clock for switching the X1 clock from the oscillating state to STOP mode, use 

the oscillation stabilization time counter status register (OSTC) to confirm that the desired oscillation stabilization time has 

elapsed after release from the STOP mode.  That is, use the OSTC register to check that the oscillation stabilization time 

corresponding to its setting has been reached

 

The OSTS register can be set by an 8-bit memory manipulation instruction. 

Reset signal generation sets the OSTS register to 07H. 

 

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