Intel S5000PSL Benutzerhandbuch
Intel® Server Boards S5000PSL and S5000XSL TPS
Design and Environmental Specifications
3.2.1.1
PCI32: 32-bit, 33-MHz PCI Sub-system
All 32-bit, 33-MHz PCI I/O is directed through the ESB2-E ICH6. The 32-bit, 33-MHz PCI
segment created by the ESB2-E-ICH6 is known as the PCI32 segment. The PCI32 segment
supports the following embedded devices:
segment created by the ESB2-E-ICH6 is known as the PCI32 segment. The PCI32 segment
supports the following embedded devices:
2D Graphics Accelerator: ATI* ES1000 Video Controller
3.2.1.2
PXA: 64-bit, 133-MHz PCI Sub-system
One 64-bit PCI-X bus segment is directed through the ESB2-E ICH6. This PCI-X segment, PXA,
is routed to PCI-X Slots 1 and 2. With only one PCI-X adapter populated in Slot 2 and Slot 1 left
empty, PCI-X Slot 2 supports a maximum speed of 133MHz. With both Slot 1 and Slot 2
populated, Slot 2 supports a maximum speed of 100MHz. PCI-X Slot 1 supports a maximum
speed of 100MHz even when Slot 2 is not populated.
is routed to PCI-X Slots 1 and 2. With only one PCI-X adapter populated in Slot 2 and Slot 1 left
empty, PCI-X Slot 2 supports a maximum speed of 133MHz. With both Slot 1 and Slot 2
populated, Slot 2 supports a maximum speed of 100MHz. PCI-X Slot 1 supports a maximum
speed of 100MHz even when Slot 2 is not populated.
3.2.1.3
PE0: One x4 PCI Express* Bus Segment
One x4 PCI Express* bus segment is directed through the ESB2-E. This PCI Express* segment,
PE0, is routed to PCI Express* Slot 4 (ROMB Slot).
PE0, is routed to PCI Express* Slot 4 (ROMB Slot).
3.2.1.4
PE1: One x4 PCI Express* Bus Segment
One x4 PCI Express* bus segment is directed through the ESB2-E. This PCI Express* segment,
PE1, is routed to PCI Express* Slot 3. This becomes a x8 PCI Express* bus segment for server
boards that do not support SAS by combining PE2 with PE1.
PE1, is routed to PCI Express* Slot 3. This becomes a x8 PCI Express* bus segment for server
boards that do not support SAS by combining PE2 with PE1.
3.2.1.5
PE2: One x4 PCI Express* Bus Segment
One x4 PCI Express* bus segment is directed through the ESB2-E. This PCI Express* segment,
PE2, is routed to PCI Express* Slot 3 for server boards that do not support SAS, or to the
onboard SAS controller for server boards that do support SAS.
PE2, is routed to PCI Express* Slot 3 for server boards that do not support SAS, or to the
onboard SAS controller for server boards that do support SAS.
3.2.1.6
PE4, PE5: Two x4 PCI Express* Bus Segments
Two x4 PCI Express* bus segments are directed through the MCH. These PCI Express*
segments, PE4 and PE5, are routed to PCI Express* Slot 5.
segments, PE4 and PE5, are routed to PCI Express* Slot 5.
3.2.1.7
PE6, PE7: Two x4 PCI Express* Bus Segments
Two x4 PCI Express* bus segments are directed through the MCH. These PCI Express*
segments, PE6 and PE7, are routed to PCI Express* Slot 6.
segments, PE6 and PE7, are routed to PCI Express* Slot 6.
3.2.1.8
PCI Express* Riser Slot
PCI Express* Slot 6 supports 3
rd
party riser cards for both 1U and 2U system configurations.
Two PCI Express* pins are designated as Riser Type pins with the definitions noted in the table
below.
below.
Revision 1.2
Intel order number: D41763-003
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