Fujitsu FR81S Benutzerhandbuch
CHAPTER 37: BUS PERFORMANCE COUNTERS
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: BUS PERFORMANCE COUNTERS
FUJITSU SEMICONDUCTOR CONFIDENTIAL
11
4.4. BPC-A Count Register : BPCTRA (Bus Performance
CounTer Register A)
The bit configuration of the BPC-A count register is shown below.
This register is a 32-bit length count register that counts the events configured by BPCCRA.
BPCTRA : Address 0714
H
(Access: Word)
bit31
bit30
• • •
bit3
bit2
bit1
bit0
BPCTRA[31:0]
Initial value
0
0
• • •
0
0
0
0
Attribute R/W
R/W
• • •
R/W
R/W
R/W
R/W
[bit31 to bit0] BPCTRA[31:0] (Bus Performance CounTer Register A) : BPC-A count
If bit7, bit6: FUNC of the BPCCRA are set to a value other than "00", the count of the target events begins.
This register is readable and writable, and can only be accessed using 32-bit access. Because the counter is not
initialized when the count is started, set the initial value when starting a new count. Furthermore, because
there is no overflow control, if the counter overflows it returns to zero and continues counting.
MB91520 Series
MN705-00010-1v0-E
1260