Fujitsu FR81S Benutzerhandbuch
CHAPTER 48: WAVEFORM GENERATOR
6. Notes
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : WAVEFORM GENERATOR
FUJITSU SEMICONDUCTOR CONFIDENTIAL
48
6. Notes
This section explains the notes.
Notes on Using the Waveform Generator
Notes on setting by a program
⋅
When you change the value of TMD8, TMD5, TMD2, TMD7, TMD4, TMD1, TMD6, TMD3, and
TMD0 bits for the 16-bit dead timer state control register (DTSCR) while the waveform generator is
active (TMD2 to TMD0/TMD5 to TMD3/TMD8 to TMD6 of the DTSCR register are "001
B
", "010
B
" or
"100
B
"), make sure that counting operation of the trigger source and the 16-bit dead timer is not in
progress. Without following this procedure, an unexpected waveform may be output from the RTO pin
due to the output scheduled in the previous trigger. In the case of RTO output, however, it will return to
the normal operation when the timer underflows or it is triggered by a new trigger source again.
⋅
When the TMD8 to TMD0 of the DTSCR register are "001
B
", the trigger source is "H" level of OUT".
When the TMD8 to TMD0 bits are "010
B
", it is the "rising edge of OUT". When the TMD8 to TMD0
bits are "100
B
", it is the "rising or falling edge of OUT". For example, when the TMD8 to TMD0 bits
change from "100
B
" to "010
B
", you will be able to execute the following procedure:
1. Set the 16-bit dead timer register (TMRR) to an extremely small value as "0001
H
".
2. Set the output of RTO1, RTO3, and RTO5 to "L" or "H" and wait until an underflow occurs at timer 0, 1,
and 2.
3. Change the mode bits (TMD8 to TMD0) and the corresponding settings.
4. The modified output waveform will be appeared at RTO pin after 1 machine cycle.
⋅
When a value is written to the 16-bit dead timer register (TMRR) while the timer is counting, this new
value will become effective in the next timer trigger. When accessing the timer register, use a half-word
or word transfer instruction.
⋅
Change the DCK2 to DCK0 of the waveform control register 1 (SIGCR1) only when the timer is not
counting.
⋅
Change the NWS1 and NWS0 of the waveform control register 1 (SIGCR1) only when the noise
cancellation feature is disabled.
Notes on interrupts
⋅
The interrupt flags (TMIF) must be cleared before setting "1" to the interrupt request enable bit (TMIE)
of the 16-bit dead timer state control register (DTSCR).
⋅
The interrupt flags (DTIF) must be cleared before setting "1" to the interrupt request enable bit (DTIE)
of the waveform control register 1 (SIGCR1).
MB91520 Series
MN705-00010-1v0-E
2093