Fujitsu FR81S Benutzerhandbuch
CHAPTER 40: MULTI-FUNCTION SERIAL INTERFACE
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : MULTI-FUNCTION SERIAL INTERFACE
FUJITSU SEMICONDUCTOR CONFIDENTIAL
17
Address
Registers
Registers function
+0
+1
+2
+3
Base+
18h
[UART]
Reserved
[CSIO]
TBYTE3n
[LIN-UART]
LAMESRn
[I
2
C]
Reserved
[UART]
Reserved
[CSIO]
TBYTE2n
[LIN-UART]
LAMERTn
[I
2
C]
Reserved
[UART]
Reserved
[CSIO]
TBYTE1n
[LIN-UART]
LAMIERn
[I
2
C]
Reserved
[UART]
TBYTE0n
[CSIO]
TBYTE0n
[LIN-UART]
LAMTIDn/
LAMRIDn
[I
2
C]
Reserved
[UART] Transfer byte register
[CSIO] Transfer byte register
[LIN-UART] Transfer byte register
[LIN-UART] LIN assist mode trouble examination register
[LIN-UART] LIN assist mode interrupt enable register
[LIN-UART] LIN assist mode transmission/reception ID register
Base+
1Ch
[UART]
BGRn
[CSIO]
BGRn
[LIN-UART]
BGRn
[I
2
C]
BGRn
[UART]
Reserved
[CSIO]
Reserved
[LIN-UART]
Reserved
[I
2
C]
ISMKn
[UART]
Reserved
[CSIO]
Reserved
[LIN-UART]
Reserved
[I
2
C]
ISBAn
[UART] Baud rate generator register
[CSIO] Baud rate generator register
[LIN-UART] Baud rate generator register
[I
2
C] Baud rate generator register
[I
2
C] 7-bit slave address mask register
[I
2
C] bit slave address register
Base+
20h
[Common]
FCR1n
[Common]
FCR0n
[Common]
FBYTEn
[Common] FIFO control register 1
[Common] FIFO control register 0
[Common] FIFO control register 0
[Common] FIFO byte register
Base+
24h
[Common]
FTICRn
Reserved
[Common] Transmission FIFO interrupt control register
MB91520 Series
MN705-00010-1v0-E
1330