Fujitsu FR81S Benutzerhandbuch
CHAPTER 48: WAVEFORM GENERATOR
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : WAVEFORM GENERATOR
FUJITSU SEMICONDUCTOR CONFIDENTIAL
10
4.1.2. 16-bit Dead Timer State Control Register (DTSCR)
The bit configuration for the 16-bit dead timer state control register is shown below.
The 16-bit dead timer state control register (DTSCR) is used to control operation mode, interrupt request
enable, interrupt request flag, GATE signal enable, and output level polarity of the waveform generator.
DTSCR0: Address 12A8
H
(Access: Byte, Half-word, Word)
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
DMOD0 GTEN1 GTEN0
TMIF0
TMIE0
TMD2
TMD1
TMD0
Initial values
0
0
0
0
0
0
0
0
Attributes
R/W
R/W
R/W
R(RM1),
W
R/W
R/W
R/W
R/W
[bit7] DMOD0: Output polarity control bit
DMOD0
Function
0
Normal polarity output
1
Inverted polarity output
⋅
This bit is used to configure U/V/W output in the dead time timer mode.
⋅
When this bit is set, output polarity of U/V/W will be inverted.
Note:
This bit does not mean anything if the dead time timer mode is not selected. (TMD2: bit26=0)
[bit6] GTEN1: GATE signal control bit 1
GTEN1
Function
0
GATE signal will not be controlled by a compare output of the output compare.
(asynchronous mode)
1
GATE signal will be controlled by a compare output of the output compare.
(synchronous mode)
⋅
This bit is used to control the PPG timer's GATE signal output for the compare output of the output
compare.
⋅
If it is set to 0, GATE signal will not be output.
⋅
If it is set to 1, GATE signal will be output. PPG of the output destination can be selected from PSEL01,
PSEL00 of SIGCR20/21.
[bit5] GTEN0: GATE signal control bit 0
GTEN0
Function
0
GATE signal will not be controlled by a compare output of the output compare.
(asynchronous mode)
1
GATE signal will be controlled by a compare output of the output compare.
(synchronous mode)
⋅
This bit is used to control the PPG timer's GATE signal output for the compare output of the output
compare.
⋅
If it is set to 0, GATE signal will not be output.
⋅
If it is set to 1, GATE signal will be output. PPG of the output destination can be selected from PSEL01,
PSEL00 of SIGCR20/21.
MB91520 Series
MN705-00010-1v0-E
2055