Fujitsu FR81S Benutzerhandbuch
CHAPTER 7: RESET
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER :
RESET
FUJITSU SEMICONDUCTOR CONFIDENTIAL
13
4.4. PMU Status Register : PMUSTR (Power Management
Unit STatus register)
The bit configuration of the PMU status register is shown.
This register indicates the PMU status.
PMUSTR : Address0590
H
(Access : Byte, Half-word, Word)
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
PMUST
Reserved
PONR_F RSTX_F
Initial value
0
0
0
0
0
0
1
*
Attribute
R,W
R0,W0
R0,W0
R0,W0 R0,W0 R0,W0
R,W
R,W
* : It will be initialized to "1" by RSTX pin asserts (including simultaneous assert with NMIX). It will not be
initialized by the other reset factors.
[bit7] PMUST (Power Management Unit STatus)
[bit7] PMUST (Power Management Unit STatus)
The state immediately before shows information on whether it was a shutdown mode.
PMUST
PMU status
0
Operation return from initial state and initialization reset
1
Operation return from Shutdown mode
This bit is cleared by writing "0". "1" writing is invalid.
[bit6 to bit2] Reserved
"0" is always read. Please be sure to write "0".
[bit1] PONR_F (Power ON Reset Flag)
This bit is a power-on reset detection flag.
PONR_F
Power-on reset
0
No detection
1
Detection
This bit is cleared by writing "0". "1" writing is invalid.
This bit is not initialized in reset factors other than power-on reset.
[bit0] RSTX_F (ReSeTX input Flag)
This bit is an external reset detection flag.
RSTX_F
RSTX input reset
0
No detection
1
Detection
This bit is cleared by writing "0". "1" writing is invalid.
This bit is not cleared by the power-on reset. Be sure to use after clear.
MB91520 Series
MN705-00010-1v0-E
266