Fujitsu FR81S Benutzerhandbuch
CHAPTER 24: 16-BIT FREE-RUN TIMER
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : 16-BIT FREE-RUN TIMER
FUJITSU SEMICONDUCTOR CONFIDENTIAL
10
[bit0] GSCLR: Simultaneous timer clear bit
GSCLR
Function
Read
Write
0
"0" is always read out
Counter will not be initialized
1
Counter will be initialized to "0000
H
"
simultaneously.
⋅
This bit is used to initialize the free-run timer 16-bit free-run timer specified by the timer synchronous
activation enable register (TCGSE) to "0000
H
".
⋅
When this bit is set to "1":
Initialize the 16-bit free-run timer of the free-run timer specified by the timer synchronous activation
enable register (TCGSE). At this time, the SCLR bit of the timer state control register (TCCS) of the
free-run timer specified by the timer synchronous activation enable register (TCGSE) will be set to "1".
⋅
When this bit is set to "0":
Cancel the instruction of initializing the 16-bit free-run timer of the free-run timer specified by the timer
synchronous activation enable register (TCGSE). At this time, the SCLR bit of the timer state control
register (TCCS) of the free-run timer specified by the timer synchronous activation enable register
(TCGSE) will be cleared to "0".
⋅
The value read out is always "0".
MB91520 Series
MN705-00010-1v0-E
917