Analog Devices ADSP-21364 Benutzerhandbuch

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ADSP-21364 EZ-KIT Lite Evaluation System Manual

The parallel flash memory and the SRAM connect to the parallel port of 
the processor. The parallel port is a multiplexed address and data port. 
The port can connect to 8-bit and 16-bit memory devices. When config-
uring the parallel port, keep in mind that the memory devices on the 
board are 8 bits wide.

To access the SRAM and flash memories, set up a parallel port DMA. For 
more information on how to connect the SRAM and flash memories, see 

The SPI flash memory connects to the SPI port of the processor and uses 

FLAG0

 as a chip select. In order for 

FLAG0

 to behave as a chip select, clear 

the 

PPFLG

 bit in the 

SYSCTL

 register.

An example program is included in the EZ-KIT Lite installation directory 
to demonstrate how the parallel port and SPI port can be configured to 
access the memories.

The AD1835A is a high-performance, single-chip codec featuring four ste-
reo digital-to-analog converters (DAC) for audio output and one stereo 
analog-to-digital converters (ADC) for audio input. The codec can input 
and output data with a sample rate of up to 96 kHz on all channels. A 
192 kHz sample rate can be used with the one of the DAC channels.

The processor interfaces with the AD1835A codec via the DAI port. The 
DAI interface pins can be configured to transfer serial data from the 
AD1835A codec in either time-division multiplexed (TDM) or two-wire 
interface (TWI) mode. For more information on how the AD1835A con-
nects to the DAI, see 

.

The master input clock (

MCLK

) for the AD1835A can be generated by the 

on-board 12.288 MHz oscillator or can be supplied by one of the DAI 
pins of the processor. Using one of the pins to generate the 

MCLK

, as