Analog Devices ADSP-21364 Benutzerhandbuch

2-6

ADSP-21364 EZ-KIT Lite Evaluation System Manual

To use the DAI for a different purpose, disable any signal driving the DAI 
pins, with a switch. See 

 for 

how to. In addition, the codec setup switch can route the output signal of 
the 12.288 MHz audio oscillator. By default, the signal is used as the mas-
ter clock (

MCLK

) for the AD1835A codec. 

All of the DAI signals are available externally via the expansion interface 
connectors (

J1–3

), as well as the 0.1” spaced header 

P3

. The pinout of the 

connectors can be found in

.

The serial peripheral interface (SPI) of the processor connects to an SPI 
flash memory and the AD1835A audio codec. The 

FLAG0

 pin is used as a 

memory select for the SPI flash memory, and the 

FLAG3

 pin—for the 

AD1835A’s configuration registers.

The SPI chip select lines for the SPI flash memory and the AD1835A 
audio codec connect to the processor via switch 

SW8

 pins 1 and 3. The 

default for 

SW8

 is all positions 

ON

. The switch disables the SPI devices on 

the EZ-KIT Lite, enabling the same flag pins be driven on the expansion 
interface

All of the SPI signals are available externally via the expansion interface 
connectors (

J1–3

), as well as the 0.1” spaced header 

P2

. The pinout of the 

connectors can be found in 

.

The processor has four general-purpose IO 

FLAG

 pins. 

 describes 

each flag connections.