Motorola MCPN750A Benutzerhandbuch
Block Diagram
http://www.motorola.com/computer/literature
6-21
6
The MCPN750A also contains four 16-bit Smart Voltage FLASH SMT
devices (Intel Part #E28F800CVB70) that appear as FLASH Bank A to the
Falcon chipset. The FLASH size for this bank is 4MB when 8Mbit devices
are used. Only 32-bit writes are supported for this bank of FLASH. There
is a jumper to tell the Falcon chipset where to fetch the reset vector. When
the jumper is installed, the Falcon chipset maps 0xFFF00100 to these
sockets (Bank B).
devices (Intel Part #E28F800CVB70) that appear as FLASH Bank A to the
Falcon chipset. The FLASH size for this bank is 4MB when 8Mbit devices
are used. Only 32-bit writes are supported for this bank of FLASH. There
is a jumper to tell the Falcon chipset where to fetch the reset vector. When
the jumper is installed, the Falcon chipset maps 0xFFF00100 to these
sockets (Bank B).
The onboard monitor/debugger, PPCBug, resides in the Boot Flash chips
on the MCPN750A. PPCBug provides functionality for:
on the MCPN750A. PPCBug provides functionality for:
❏
Booting the operating system
❏
Initializing after a reset
❏
Displaying and modifying configuration variables
❏
Running self-tests and diagnostics
❏
Updating firmware ROM
Under normal operation, the Flash devices are in “read-only” mode, their
contents are pre-defined, and they are protected against inadvertent writes
due to loss of power conditions. However, for programming purposes,
programming voltage is always supplied to the devices and the Flash
contents may be modified by executing the proper program command
sequence. Refer to Intel Data Sheet 290539-004, dated December 1996
and/or to the PPCBug Firmware Package User’s Manual for further
device-specific information on modifying Flash contents.
contents are pre-defined, and they are protected against inadvertent writes
due to loss of power conditions. However, for programming purposes,
programming voltage is always supplied to the devices and the Flash
contents may be modified by executing the proper program command
sequence. Refer to Intel Data Sheet 290539-004, dated December 1996
and/or to the PPCBug Firmware Package User’s Manual for further
device-specific information on modifying Flash contents.
JTAG/COP
Connector J6 on the MCPN750A board provides access to the JTAG/COP
interface on the MPC750 processor. The interface can be used to provide
debug control and observation of the MPC750. Refer to Table 7-9 for
pinout information.
interface on the MPC750 processor. The interface can be used to provide
debug control and observation of the MPC750. Refer to Table 7-9 for
pinout information.
Bank A Flash Programming Enable
No jumper is required on header J9. The FLASH programming for Bank
A is permanently enabled with onboard resistors.
A is permanently enabled with onboard resistors.