Lucent Technologies MN102F85K Benutzerhandbuch
Timers
16-Bit Timer Setup Examples
MN102H75K/F75K/85K/F85K LSI User Manual
Panasonic Semiconductor Development Company
113
Panasonic
■
To service the interrupts:
Run the interrupt service routine. The routine must determine the interrupt group,
then clear the interrupt request flag.
Timer 5 can input a two-phase encoder signal. Timer 5 does not operate in STOP
mode, when B
OSC
is off. If you use an external clock, it must be synchronized to
B
OSC
.
Table 4-4 shows the count direction for the timing diagram in figure 4-42. In
down counting, when the binary counter reaches 0, it loops to the value in
down counting, when the binary counter reaches 0, it loops to the value in
TM5CA. An interrupt B occurs when the contents of TM5BC match those of
TM5CB.
TM5CB.
Table 4-4 Count Direction for 4x Two-Phase Encoder Timing Example
Up Counting
Down Counting
TM5IA
↑
1
↓
0
↑
0
↓
1
TM5IB
0
↑
1
↓
1
↑
0
↓
Figure 4-42 4x Two-Phase Encoder Input Timing (Timer 5)
TM5CA
TM5CB
TM5IA
TM5BC
TM5IB
Interrupt
0000
1FFF
1FFE
1FFD
1FFE
1FFF
1FFF
0000
0001
0FFF
1000
1000
1001
B