Clevo D900F Benutzerhandbuch
Schematic Diagrams
Power Delivery Chart B - 47
B.Sch
e
m
a
tic D
iag
rams
rams
Power Delivery Chart
Sheet 46 of 47
Power Delivery
Chart
25 A
V_1P1 _ QPI
V_1P1 _ PE
1.1V
1.1V
20 A
75 0mA
1A
KBC_AVDD
3.3V
75 0mA
V_1P1
EC I TE85 12
V_1P05 _ICH 1.0 5V
CPU_VTTD 1 .2V
I nt e l IC H10
5V_REF_SUS 5V
VCC3 3.3V
AZ ALIA
5VREF 5V
3VS
DVDD
V_1P8 _ CL
VCC1_5 1.5V
M a x I dle P o w er: 15 .1 W
T DP: 30 .5 W
T DP: 30 .5 W
VC CA_1 P1
VCCSUS3_3 3.3V
I n te l I OH 3 6S/ 24 S
V_1P5_ FILTER 1.5 V
DDR _VTT
V_DIMM
D DR3 D IM M s
Int el 13 66 CPU
VC ORE
CPU_VTTD
VC CA_1 P5
VCCRTC 3 .3V
1.1V
1.8V
1.5V
1.8V
0.9V
BAT T ERY
1.2V
1.5V
1.5V
1.05 V
3.3V
3.3V
5V
5V
3.3V
1.5V
0.75 V
R T C V
C C
3.3V
0 .3A
0 .1A
4.8V
3.3V
14 5 A
23 A
14 mA
0.9 7A
0.7 4A
1.3 1A
0.5 8A
0.7 A
6mA
10 mA
6 u A
AVDD
V_0P9 _ CL
3A
3A
V_1P8 _ PLL
25 0mA
1.1V
75 0mA
CPU_VTTA
5A
V_DIMM
1.5V
6A
V_1P8 _ PLL
1.8V
2A
50 0mA
3
V
S
5
V
S
V
_
0 P
9 _
C L
/2 , em pt y
V _
1 P
8
_
C L
*08 0 5 0 Oh m
e mpt y
e mpt y
1 .
1 V
S
=
V C
C A
_ 1
P
1
SI48 00BDY
V
C
O R E
C P U
_
V T
T
1
. 5
V =
V
_
D I
M
M ( T o
t
a l
2
8 A
)
NCP53 9 2M NR2G
SC4 8 6
ISL6 3 14 CR
V _
1 P
8
_
P L
L
3
V
S
V
D
D
3
5
V
S
V
D
D
5
08 05 0 Ohm
0 80 5 0 O hm
V
_
1
P 5
_
F I L T
E
R
V
_
1
P 0
5
_ I C H
SI4 80 0BDY
V
D
D
3
1
.
5 V
S
= V
C C
A _
1
P
5
SC4 1 2A
V
C
C
1 _
5
1
.
8
V S
= V
_ 1
P
8
_ P
L
L ( T o
t
a l
2 . 2 A
)
AME8 804AEEY
VIN (PW R _SR C)
VDD5
+ /-5 %
+ /-5 %
10A
1.0A
X 16 P CIE M XM 3 .0
3. 3V S(3 VRU N)
2.5A
5V S(5 VRU N)
VIN
19 V
+/- 5%
+/- 5%
12 V
+/- 5%
+/- 5%
3
V
S
5
V
S
VDD3
+ /- 5%
+ /- 5%
3
V
S
LP2 95 1CDR2 G
SI4800 BDY
LTC3 85 0
T DP: 13 0W
SI48 00 BDY
1
.
8
V
1 . 5
V
S
1
.
5
V
SI4800BDY
5
V
SI4800BDY
3
V
SC412A
1
.
1 V
S
1
. 1
V S