Texas Instruments TMS320TCI648x Benutzerhandbuch
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5.28 TX CPPI Interrupt Condition Routing Registers (TX_CPPI_ICRR and TX_CPPI_ICRR2)
SRIO Registers
and
summarize the ICRRs for the TXU. These registers route queue interrupts to
interrupt destinations. For example, if ICS6 = 1 in TX_CPPI_ICSR and ICR6 = 0011b in TX_CPPI_ICRR,
the interrupt request from TX buffer descriptor queue 6 is sent to interrupt destination 3. For additional
programming see
the interrupt request from TX buffer descriptor queue 6 is sent to interrupt destination 3. For additional
programming see
.
Figure 89. TX CPPI Interrupt Condition Routing Registers
TX CPPI Interrupt Condition Routing Register (TX_CPPI_ICRR) (Address Offset 02D0h)
31
28 27
24 23
20 19
16
ICR7
ICR6
ICR5
ICR4
R/W-0000
R/W-0000
R/W-0000
R/W-0000
15
12 11
8 7
4 3
0
ICR3
ICR2
ICR1
ICR0
R/W-0000
R/W-0000
R/W-0000
R/W-0000
TX CPPI Interrupt Condition Routing Register 2 (TX_CPPI_ICRR2) (Address Offset 02D4h)
31
28 27
24 23
20 19
16
ICR15
ICR14
ICR13
ICR12
R/W-0000
R/W-0000
R/W-0000
R/W-0000
15
12 11
8 7
4 3
0
ICR11
ICR10
ICR9
ICR8
R/W-0000
R/W-0000
R/W-0000
R/W-0000
LEGEND: R/W = Read/Write; -n = Value after reset
Table 80. TX CPPI Interrupt Condition Routing Register Field Descriptions
Field
Value
Description
ICRx
Interrupt condition routing. Routes the interrupt request from TX buffer descriptor queue x to one of
(x = 0 to 15)
eight interrupt destinations (INTDST0–INTDST7).
0000b
INTDST0
0001b
INTDST1
0010b
INTDST2
0011b
INTDST3
0100b
INTDST4
0101b
INTDST5
0110b
INTDST6
0111b
INTDST7
1xxxb
Reserved
Serial RapidIO (SRIO)
146
SPRUE13A – September 2006