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5.56 Processing Element Features CAR (PE_FEAT)
SRIO Registers
The processing element features CAR (PE_FEAT) is shown in
and described in
Figure 119. Processing Element Features CAR (PE_FEAT) - Address Offset 1010h
31
30
29
28
27
24
BRIDGE
MEMORY
PROCESSOR
SWITCH
Reserved
R-0
R-0
R-1
R-0
R-0h
23
16
Reserved
R-00h
15
8
Reserved
R-00h
7
6
5
4
3
2
0
FLOW_
RETRANSMIT_
CRF_
LARGE_
EXTENDED_
CONTROL_
EXTENDED_ADDRESSING_SUPPORT
SUPPRESS
SUPPORT
SUPPORT
FEATURES
SUPPORT
R-0
R-0
R-0
R-0
R-1
R-001
LEGEND: R = Read only; -n = Value after reset
Table 127. Processing Element Features CAR (PE_FEAT) Field Descriptions
Bit
Field
Value
Description
31
BRIDGE
PE can bridge to another interface. Examples are PCI,
proprietary processor buses, DRAM, etc.
proprietary processor buses, DRAM, etc.
30
MEMORY
PE has physically addressable local address space and can be
accessed as an endpoint through non-maintenance (i.e.,
non-coherent read and write) operations. This local address
space may be limited to local configuration Registers, or could be
on-chip SRAM, etc.
accessed as an endpoint through non-maintenance (i.e.,
non-coherent read and write) operations. This local address
space may be limited to local configuration Registers, or could be
on-chip SRAM, etc.
29
PROCESSOR
PE physically contains a local processor or similar device that
executes code. A device that bridges to an interface that
connects to a processor does not count (see bit 31).
executes code. A device that bridges to an interface that
connects to a processor does not count (see bit 31).
28
SWITCH
PE can bridge to another external RapidIO interface. An internal
port to a local endpoint does not count as a switch port. For
example, a device with two RapidIO ports and a local endpoint is
a two port switch, not a three port switch, regardless of the
internal architecture.
port to a local endpoint does not count as a switch port. For
example, a device with two RapidIO ports and a local endpoint is
a two port switch, not a three port switch, regardless of the
internal architecture.
27–8
Reserved
0
These read-only bits return 0s when read.
7
FLOW_CONTROL_SUPPORT
PE supports congestion flow control mechanism
0
PE does not support flow control
1
PE supports flow control
6
RETRANSMIT_SUPPRESS
PE supports suppression of error recovery on packet CRC errors.
0
PE does not support suppression
1
PE supports suppression
5
CRF_SUPPORT
This bit indicates PE support for the Critical Request Flow (CRF)
Function.
Function.
0
PE does not support CRF Function
1
PE supports CRF Function
4
LARGE_SUPPORT
Support of common transport large systems.
0
PE does not support common transport large systems
1
PE supports common transport large systems
3
EXTENDED_FEATURES
PE has extended features list; the extended features pointer is
valid.
valid.
186
Serial RapidIO (SRIO)
SPRUE13A – September 2006