PMC-Sierra PM8385 Merkblatt

 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., 

© Copyright PMC-Sierra, Inc. 2003. 

Issue 2

All rights reserved. 

• Supports four physical interfaces for 

Gigabit Ethernet at 1.25 Gbit/s per 
IEEE 802.3z or Fibre Channel physical 
interfaces at 1.0625 or 2.125 Gbit/s per 
Fibre Channel Physical Interface (FC-
PI) for repeating or retiming 
applications.

• Backplane repeating/retiming signal 

integrity features enable standards 
compliance, link extension and robust 
gigabit-serial operation in the hostile 
backplane environment.

• Provides direct connection to high-

speed serial backplanes, coax 
stacking cables, or optical / copper 
Small Form Factor Pluggable (SFP) 
modules.

• Provides non-blocking cross-bar for 

protection switching and data bi-cast, 
multi-cast or broadcast.

• Fast high-speed serial lock times and 

low device latency.

• Rate detection/auto-selection between 

1G and 2G Fibre Channel.

• Extensive per port backplane 

monitoring for loss of signal, error rates, 
and link level violations.

• Supports single-ended or differential 

125 MHz reference clock for Gigabit 
Ethernet, or 106.25 MHz reference 
clock for Fibre Channel applications.

• High-speed outputs with selectable 

output amplitude and programmable 
pre-emphasis per port to counteract 
dielectric losses and allow maximum 
reach on printed circuit boards and 
cables.

• Programmable receive input 

equalization provides robust data 
recovery of highly degraded input 
signals.

• Minimal board footprint and exceptional 

signal integrity achieved: 

•

No external components are required 
to interface the high-speed signals 
due to internal AC coupling.

•

Programmable receive input 
termination of 100 ohm or 150 ohm 
differential.

•

Programmable output impedance of 
100 ohm or 150 ohm differential.

• Digital loss of link (DLOL) detect pin 

provides status output for monitoring 
individual or multiple links.

• DLOL and optional interrupt pin can be 

programmed to indicate:

•

Analog loss of signal.

•

Excessive 8B/10B code and disparity 
violations.

•

Fibre Channel comma density.

• Loss of synchronization to detect 

Gigabit Ethernet or Fibre Channel 
framing errors.

• Internal packet generator and 

comparator features simplify backplane 
and jitter testing via:

•

Programmable pattern (can be used 
with GE high, low and mixed 
frequency tests).

10

10

10

10

10

10

10

10

RDIP[0]
RDIN[0]

2

2

TDOP[0]

TDON[0]

RDIP[1]
RDIN[1]

2

2

TDOP[1]

TDON1]

RDIP[2]
RDIN[2]

2

2

TDOP[2]
TDON[2]

RDIP[3]
RDIN[3]

2

2

TDOP[3]
TDON[3]

PR

EE

M

P

H

[1

:0

]

R

E

C

E

Q

U

A

L

IZ

E

[1

:0

]

D

L

O

L

B

YP_M

A

SK

RE

T_

MO

DE

FC_

G

E

_

R

E

T_

S

E

L

H

A

LF

_R

AT

E

AU

T

O

_R

AT

E

_

SE

L

T

X

100/

150[3:0]

R

X

100/

150[3:0]

TW

IS

E

L

MD

IO

_S

D

A

MD

C_S

C

L

DV

P

R

TA

D[

4

:0

]

RE

S

E

TB

RE

F

C

L

K

_

S

C

L

K

_

SEL

R

E

F

C

LK

_N

R

E

F

C

LK_P

RP

RE

S

EX

T

C

AP

TDO

TDI

TMS

TCK

TRSTB

DLOLB

PORT_DLOLB[3:0]

INTRB

PORT_2G_RATE[3:0]