Intel 82540EP/EM Benutzerhandbuch
Introduction
4
Software Developer’s Manual
1.3.5
Additional Performance Features
•
Provides adaptive Inter Frame Spacing (IFS) capability, enabling collision reduction in half
duplex networks (82544GC/EI)
duplex networks (82544GC/EI)
•
Programmable host memory receive buffers (256 B to 16 KB)
•
Programmable cache line size from 16 B to 128 B for efficient usage of PCI bandwidth
•
Implements a total of 64 KB (40 KB for the 82547GI/EI) of configurable receive and transmit
data FIFOs. Default allocation is 48 KB for the receive data FIFO and 16 KB for the transmit
data FIFO
data FIFOs. Default allocation is 48 KB for the receive data FIFO and 16 KB for the transmit
data FIFO
•
Descriptor ring management hardware for transmit and receive. Optimized descriptor fetching
and write-back mechanisms for efficient system memory and PCI bandwidth usage
and write-back mechanisms for efficient system memory and PCI bandwidth usage
•
Provides interrupt coalescing to reduce the number of interrupts generated by receive and
transmit operations (82544GC/EI)
transmit operations (82544GC/EI)
•
Supports reception and transmission of packets with length up to 16 KB
•
New intelligent interrupt generation features to enhance driver performance (not applicable to
the 82544GC/EI):
the 82544GC/EI):
— Packet interrupt coalescing timers (packet timers) and absolute-delay interrupt timers for
both transmit and receive operation
— Short packet detection interrupt for improved response time to TCP acknowledges
— Transmit Descriptor Ring “Low” signaling
— Interrupt throttling control to limit maximum interrupt rate and improve CPU utilization