Citizen Systems CBM920II Benutzerhandbuch

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POWER
DATA
STB
T1
DATA
DATA
DATA
T2
BUSY
ACK
T3
T1: 2.0us MIN
T2: 500ms MIN
T3: 5us TYP
5.3  Description of Input/Output Signals
(1)
Input signal
• DATA 1 to DATA 8 . . . 8 bit parallel signal (positive logic)
• STB . . . Strobe signal for reading out data (negative logic)
• RESET . . . Signal for resetting the entire unit (negative logic 4 ms or more)
(2)
Output signal
• ACK . . . 8 bit data signal for requesting data.  ACK is issued at the end of the
BUSY signal (negative logic)
• BUSY . . . Signal indicating the printer is busy.  Input new data when the signal
is in “LOW” condition (positive logic)
• PE . . .Signal that shows form cutting (positive logic)
• FAULT. . . . Signal that shows that trouble like mechanism alarm etc. occurred
(3)
Other
• GND . . . Ground commonly used in the circuit
• FRAME GND . . . Frame ground (case ground)
(4)
Timing chart
Busy signal timing: Clear timing can be selected by the memory switch.
ACK signal timing: The following kinds of timing can be selected by the memory
switch setting.
BUSY
ACK
T4
BUSY
ACK
BUSY
Before
Center
After
ACK
T5
Busy signal timing: Clear timing can be selected by the memory switch.
ACK signal timing: The following kinds of timing can be selected by the memory
switch setting.
T4: 5us TYP
T5: 5us TYP