Intel 820E Benutzerhandbuch

38  

Design 

Guide 

All RSL signals must be terminated to 1.8 V (V

TERM

) using 27-

Ω 

1% or 28 

Ω 

2% resistors at the end of 

the channel opposite the MCH. Resistor packs are acceptable. V

TERM

 must be decoupled using high-

speed bypass capacitors—one 0.1 µF ceramic chip capacitor per two RSL lines—near the terminating 
resistors. Additionally, bulk capacitance is required. Assuming a linear regulator with an approximately 
20 ms response time, two 100 µF tantalum capacitors are recommended. The trace length between the 
last RIMM and the termination resistors should be less than 3 inches. Length matching in this section of 
the channel is not required. The V

TERM

 power island should be at least 50 mils wide. This voltage need 

not be supplied during Suspend to RAM. 

RSL Signals

Terminator

R-packs

direct_rdram_term

V

TERM

 

Note:  It is necessary to compensate for the slight difference in electrical characteristics between a dummy via 

and a real via. Refer to Section 2.7.2.7 for more information on via compensation.