Intel ATX12V Benutzerhandbuch
ATX12V Power Supply Design Guide
Version 2.0
25
3.3.4. Power-on Time
The power-on time is defined as the time from when PS_ON# is pulled low to when the
+12 VDC, +5 VDC, and +3.3 VDC outputs are within the regulation ranges specified in
Section 3.2.1. The power-on time shall be less than 500 ms (T
+12 VDC, +5 VDC, and +3.3 VDC outputs are within the regulation ranges specified in
Section 3.2.1. The power-on time shall be less than 500 ms (T
1
< 500 ms).
+5 VSB shall have a power-on time of two seconds maximum after application of valid AC
voltages.
voltages.
3.3.5. Risetime
The output voltages shall rise from
≤10% of nominal to within the regulation ranges
≤
T
2
≤
20 ms).
There must be a smooth and continuous ramp of each DC output voltage from 10% to 90%
of its final set-point within the regulation band, while loaded as specified in Section 3.2.3.
The smooth turn-on requires that, during the 10% to 90% portion of the rise time, the slope
of the turn-on waveform must be positive and have a value of between 0 V/ms and
[Vout,nominal / 0.1] V/ms. Also, for any 5 ms segment of the 10% to 90% risetime
waveform, a straight line drawn between the end points of the waveform segment must
have a slope
of its final set-point within the regulation band, while loaded as specified in Section 3.2.3.
The smooth turn-on requires that, during the 10% to 90% portion of the rise time, the slope
of the turn-on waveform must be positive and have a value of between 0 V/ms and
[Vout,nominal / 0.1] V/ms. Also, for any 5 ms segment of the 10% to 90% risetime
waveform, a straight line drawn between the end points of the waveform segment must
have a slope
≥
[Vout,nominal / 20] V/ms.
3.3.6. Overshoot at Turn-on / Turn-off
The output voltage overshoot upon the application or removal of the input voltage, or the
assertion/deassertion of PS_ON#, under the conditions specified in Section 3.1, shall be
less than 10% above the nominal voltage. No voltage of opposite polarity shall be present
on any output during turn-on or turn-off.
assertion/deassertion of PS_ON#, under the conditions specified in Section 3.1, shall be
less than 10% above the nominal voltage. No voltage of opposite polarity shall be present
on any output during turn-on or turn-off.
3.3.7. Reset after Shutdown
If the power supply latches into a shutdown state because of a fault condition on its outputs,
the power supply shall return to normal operation only after the fault has been removed and
the PS_ON# (or AC input) has been cycled OFF/ON with a minimum OFF time of
1 second.
the power supply shall return to normal operation only after the fault has been removed and
the PS_ON# (or AC input) has been cycled OFF/ON with a minimum OFF time of
1 second.
3.3.8. +5 VSB at AC Power-down
After AC power is removed, the +5 VSB standby voltage output should remain at its steady
state value for the minimum hold-up time specified in Section 3.2.11 until the output
begins to decrease in voltage. The decrease shall be monotonic in nature, dropping to
0.0 V. There shall be no other perturbations of this voltage at or following removal of AC
power.
state value for the minimum hold-up time specified in Section 3.2.11 until the output
begins to decrease in voltage. The decrease shall be monotonic in nature, dropping to
0.0 V. There shall be no other perturbations of this voltage at or following removal of AC
power.